[coreboot-gerrit] Change in coreboot[master]: sb/nvidia/ck804: Get rid of device_t
Elyes HAOUAS (Code Review)
gerrit at coreboot.org
Sat May 19 10:57:42 CEST 2018
Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/26401
Change subject: sb/nvidia/ck804: Get rid of device_t
......................................................................
sb/nvidia/ck804: Get rid of device_t
Use of device_t has been abandoned in ramstage.
Change-Id: I59078ff96428d134f108ff2551556c8a7d2d3b37
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/southbridge/nvidia/ck804/ck804.c
M src/southbridge/nvidia/ck804/ht.c
M src/southbridge/nvidia/ck804/lpc.c
M src/southbridge/nvidia/ck804/pci.c
M src/southbridge/nvidia/ck804/smbus.c
5 files changed, 21 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/26401/1
diff --git a/src/southbridge/nvidia/ck804/ck804.c b/src/southbridge/nvidia/ck804/ck804.c
index 38988f5..3102c15 100644
--- a/src/southbridge/nvidia/ck804/ck804.c
+++ b/src/southbridge/nvidia/ck804/ck804.c
@@ -24,9 +24,9 @@
static u32 final_reg;
-static device_t find_lpc_dev(device_t dev, unsigned devfn)
+static struct device *find_lpc_dev(struct device *dev, unsigned devfn)
{
- device_t lpc_dev;
+ struct device *lpc_dev;
lpc_dev = dev_find_slot(dev->bus->secondary, devfn);
if (!lpc_dev)
@@ -53,9 +53,9 @@
return lpc_dev;
}
-static void ck804_enable(device_t dev)
+static void ck804_enable(struct device *dev)
{
- device_t lpc_dev;
+ struct device *lpc_dev;
unsigned index = 0, index2 = 0, deviceid, vendorid, devfn;
u32 reg_old, reg;
u8 byte;
@@ -184,7 +184,7 @@
}
}
-static void ck804_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void ck804_set_subsystem(struct device *dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x40,
((device & 0xffff) << 16) | (vendor & 0xffff));
diff --git a/src/southbridge/nvidia/ck804/ht.c b/src/southbridge/nvidia/ck804/ht.c
index 5f8b213..48b18cb 100644
--- a/src/southbridge/nvidia/ck804/ht.c
+++ b/src/southbridge/nvidia/ck804/ht.c
@@ -26,7 +26,7 @@
unsigned long acpi_fill_mcfg(unsigned long current)
{
- device_t dev;
+ struct device *dev;
unsigned long mcfg_base;
dev = dev_find_slot(0x0, PCI_DEVFN(0x0,0));
diff --git a/src/southbridge/nvidia/ck804/lpc.c b/src/southbridge/nvidia/ck804/lpc.c
index 2b0bdd5..2c7519b 100644
--- a/src/southbridge/nvidia/ck804/lpc.c
+++ b/src/southbridge/nvidia/ck804/lpc.c
@@ -51,7 +51,7 @@
#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
#endif
-static void lpc_common_init(device_t dev)
+static void lpc_common_init(struct device *dev)
{
u32 dword;
struct resource *res;
@@ -68,12 +68,12 @@
#endif
}
-static void lpc_slave_init(device_t dev)
+static void lpc_slave_init(struct device *dev)
{
lpc_common_init(dev);
}
-static void rom_dummy_write(device_t dev)
+static void rom_dummy_write(struct device *dev)
{
u8 old, new;
u8 *p;
@@ -103,7 +103,7 @@
unsigned pm_base = 0;
-static void lpc_init(device_t dev)
+static void lpc_init(struct device *dev)
{
u8 byte, byte_old;
int on, nmi_option;
@@ -158,7 +158,7 @@
rom_dummy_write(dev);
}
-static void ck804_lpc_read_resources(device_t dev)
+static void ck804_lpc_read_resources(struct device *dev)
{
struct resource *res;
unsigned long index;
@@ -203,7 +203,7 @@
}
}
-static void ck804_lpc_set_resources(device_t dev)
+static void ck804_lpc_set_resources(struct device *dev)
{
u8 byte;
struct resource *res;
@@ -239,7 +239,7 @@
* This function is called by the global enable_resources() indirectly via the
* device_operation::enable_resources() method of devices.
*/
-static void ck804_lpc_enable_childrens_resources(device_t dev)
+static void ck804_lpc_enable_childrens_resources(struct device *dev)
{
struct bus *link;
u32 reg, reg_var[4];
@@ -248,7 +248,7 @@
reg = pci_read_config32(dev, 0xa0);
for (link = dev->link_list; link; link = link->next) {
- device_t child;
+ struct device *child;
for (child = link->children; child; child = child->sibling) {
if (child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
struct resource *res;
@@ -295,7 +295,7 @@
pci_write_config32(dev, 0xa8 + i * 4, reg_var[i]);
}
-static void ck804_lpc_enable_resources(device_t dev)
+static void ck804_lpc_enable_resources(struct device *dev)
{
pci_dev_enable_resources(dev);
ck804_lpc_enable_childrens_resources(dev);
@@ -303,7 +303,7 @@
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
-static void southbridge_acpi_fill_ssdt_generator(device_t device)
+static void southbridge_acpi_fill_ssdt_generator(struct device *device)
{
amd_generate_powernow(0, 0, 0);
}
diff --git a/src/southbridge/nvidia/ck804/pci.c b/src/southbridge/nvidia/ck804/pci.c
index a9f0f5b..d4b074d 100644
--- a/src/southbridge/nvidia/ck804/pci.c
+++ b/src/southbridge/nvidia/ck804/pci.c
@@ -25,7 +25,7 @@
static void pci_init(struct device *dev)
{
u32 dword;
- device_t pci_domain_dev;
+ struct device *pci_domain_dev;
struct resource *mem, *pref;
dword = pci_read_config32(dev, 0x04);
diff --git a/src/southbridge/nvidia/ck804/smbus.c b/src/southbridge/nvidia/ck804/smbus.c
index e3b38dd..4a4ac2f 100644
--- a/src/southbridge/nvidia/ck804/smbus.c
+++ b/src/southbridge/nvidia/ck804/smbus.c
@@ -24,7 +24,7 @@
#include "chip.h"
#include "smbus.h"
-static int lsmbus_recv_byte(device_t dev)
+static int lsmbus_recv_byte(struct device *dev)
{
unsigned device;
struct resource *res;
@@ -38,7 +38,7 @@
return do_smbus_recv_byte(res->base, device);
}
-static int lsmbus_send_byte(device_t dev, u8 val)
+static int lsmbus_send_byte(struct device *dev, u8 val)
{
unsigned device;
struct resource *res;
@@ -52,7 +52,7 @@
return do_smbus_send_byte(res->base, device, val);
}
-static int lsmbus_read_byte(device_t dev, u8 address)
+static int lsmbus_read_byte(struct device *dev, u8 address)
{
unsigned device;
struct resource *res;
@@ -66,7 +66,7 @@
return do_smbus_read_byte(res->base, device, address);
}
-static int lsmbus_write_byte(device_t dev, u8 address, u8 val)
+static int lsmbus_write_byte(struct device *dev, u8 address, u8 val)
{
unsigned device;
struct resource *res;
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I59078ff96428d134f108ff2551556c8a7d2d3b37
Gerrit-Change-Number: 26401
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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