[coreboot-gerrit] Change in coreboot[master]: device/oprom/x86emu/ops2.c: Fix coding style
Elyes HAOUAS (Code Review)
gerrit at coreboot.org
Fri May 18 08:20:15 CEST 2018
Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/26359
Change subject: device/oprom/x86emu/ops2.c: Fix coding style
......................................................................
device/oprom/x86emu/ops2.c: Fix coding style
Change-Id: I687b288b2a77129f8dfab3c0f2696438e76310f7
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/device/oprom/x86emu/ops2.c
1 file changed, 1,318 insertions(+), 1,321 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/26359/1
diff --git a/src/device/oprom/x86emu/ops2.c b/src/device/oprom/x86emu/ops2.c
index 6089b1f..c72b711 100644
--- a/src/device/oprom/x86emu/ops2.c
+++ b/src/device/oprom/x86emu/ops2.c
@@ -51,13 +51,13 @@
****************************************************************************/
static void x86emuOp2_illegal_op(u8 op2)
{
- START_OF_INSTR();
- DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
- TRACE_REGS();
- printf("%04x:%04x: %02X ILLEGAL EXTENDED X86 OPCODE!\n",
- M.x86.R_CS, M.x86.R_IP-2, op2);
- HALT_SYS();
- END_OF_INSTR();
+ START_OF_INSTR();
+ DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
+ TRACE_REGS();
+ printf("%04x:%04x: %02X ILLEGAL EXTENDED X86 OPCODE!\n",
+ M.x86.R_CS, M.x86.R_IP - 2, op2);
+ HALT_SYS();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -67,51 +67,51 @@
static void x86emuOp2_opc_01(u8 op2)
{
- int mod, rl, rh;
- u16 *destreg;
- uint destoffset;
+ int mod, rl, rh;
+ u16 *destreg;
+ uint destoffset;
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
- switch(rh) {
- case 4: // SMSW (Store Machine Status Word)
- // Decode the mod byte to find the addressing
- // Dummy implementation: Always returns 0x10 (initial value as per intel manual volume 3, figure 8-1)
+ switch (rh) {
+ case 4: // SMSW (Store Machine Status Word)
+ // Decode the mod byte to find the addressing
+ // Dummy implementation: Always returns 0x10 (initial value as per intel manual volume 3, figure 8-1)
#define SMSW_INITIAL_VALUE 0x10
- DECODE_PRINTF("SMSW\t");
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- store_data_word(destoffset, SMSW_INITIAL_VALUE);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- store_data_word(destoffset, SMSW_INITIAL_VALUE);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- store_data_word(destoffset, SMSW_INITIAL_VALUE);
- break;
- case 3:
- destreg = DECODE_RM_WORD_REGISTER(rl);
- *destreg = SMSW_INITIAL_VALUE;
- break;
- }
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- DECODE_PRINTF("\n");
- break;
- default:
- DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE IN 0F 01\n");
- TRACE_REGS();
- printf("%04x:%04x: %02X ILLEGAL EXTENDED X86 OPCODE!\n",
- M.x86.R_CS, M.x86.R_IP-2, op2);
- HALT_SYS();
- break;
- }
+ DECODE_PRINTF("SMSW\t");
+ switch (mod) {
+ case 0:
+ destoffset = decode_rm00_address(rl);
+ store_data_word(destoffset, SMSW_INITIAL_VALUE);
+ break;
+ case 1:
+ destoffset = decode_rm01_address(rl);
+ store_data_word(destoffset, SMSW_INITIAL_VALUE);
+ break;
+ case 2:
+ destoffset = decode_rm10_address(rl);
+ store_data_word(destoffset, SMSW_INITIAL_VALUE);
+ break;
+ case 3:
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ *destreg = SMSW_INITIAL_VALUE;
+ break;
+ }
+ TRACE_AND_STEP();
+ DECODE_CLEAR_SEGOVR();
+ DECODE_PRINTF("\n");
+ break;
+ default:
+ DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE IN 0F 01\n");
+ TRACE_REGS();
+ printf("%04x:%04x: %02X ILLEGAL EXTENDED X86 OPCODE!\n",
+ M.x86.R_CS, M.x86.R_IP - 2, op2);
+ HALT_SYS();
+ break;
+ }
- END_OF_INSTR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -120,11 +120,11 @@
* ****************************************************************************/
static void x86emuOp2_invd(u8 op2)
{
- START_OF_INSTR();
- DECODE_PRINTF("INVD\n");
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ START_OF_INSTR();
+ DECODE_PRINTF("INVD\n");
+ TRACE_AND_STEP();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -133,11 +133,11 @@
* ****************************************************************************/
static void x86emuOp2_wbinvd(u8 op2)
{
- START_OF_INSTR();
- DECODE_PRINTF("WBINVD\n");
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ START_OF_INSTR();
+ DECODE_PRINTF("WBINVD\n");
+ TRACE_AND_STEP();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -146,13 +146,13 @@
* ****************************************************************************/
static void x86emuOp2_wrmsr(u8 op2)
{
- /* dummy implementation, does nothing */
+ /* dummy implementation, does nothing */
- START_OF_INSTR();
- DECODE_PRINTF("WRMSR\n");
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ START_OF_INSTR();
+ DECODE_PRINTF("WRMSR\n");
+ TRACE_AND_STEP();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -162,31 +162,31 @@
static void x86emuOp2_rdtsc(u8 X86EMU_UNUSED(op2))
{
#ifdef __HAS_LONG_LONG__
- static u64 counter = 0;
+ static u64 counter = 0;
#else
- static u32 counter = 0;
+ static u32 counter = 0;
#endif
- counter += 0x10000;
+ counter += 0x10000;
- /* read timestamp counter */
- /*
- * Note that instead of actually trying to accurately measure this, we just
- * increase the counter by a fixed amount every time we hit one of these
- * instructions. Feel free to come up with a better method.
- */
- START_OF_INSTR();
- DECODE_PRINTF("RDTSC\n");
- TRACE_AND_STEP();
+ /* read timestamp counter */
+ /*
+ * Note that instead of actually trying to accurately measure this, we just
+ * increase the counter by a fixed amount every time we hit one of these
+ * instructions. Feel free to come up with a better method.
+ */
+ START_OF_INSTR();
+ DECODE_PRINTF("RDTSC\n");
+ TRACE_AND_STEP();
#ifdef __HAS_LONG_LONG__
- M.x86.R_EAX = counter & 0xffffffff;
- M.x86.R_EDX = counter >> 32;
+ M.x86.R_EAX = counter & 0xffffffff;
+ M.x86.R_EDX = counter >> 32;
#else
- M.x86.R_EAX = counter;
- M.x86.R_EDX = 0;
+ M.x86.R_EAX = counter;
+ M.x86.R_EDX = 0;
#endif
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -195,18 +195,18 @@
* ****************************************************************************/
static void x86emuOp2_rdmsr(u8 op2)
{
- /* dummy implementation, always return 0 */
+ /* dummy implementation, always return 0 */
- START_OF_INSTR();
- DECODE_PRINTF("RDMSR\n");
- TRACE_AND_STEP();
- M.x86.R_EDX = 0;
- M.x86.R_EAX = 0;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ START_OF_INSTR();
+ DECODE_PRINTF("RDMSR\n");
+ TRACE_AND_STEP();
+ M.x86.R_EDX = 0;
+ M.x86.R_EAX = 0;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
-#define xorl(a,b) (((a) && !(b)) || (!(a) && (b)))
+#define xorl(a, b) (((a) && !(b)) || (!(a) && (b)))
/****************************************************************************
REMARKS:
@@ -214,92 +214,93 @@
****************************************************************************/
int x86emu_check_jump_condition(u8 op)
{
- switch (op) {
- case 0x0:
- DECODE_PRINTF("JO\t");
- return ACCESS_FLAG(F_OF);
- case 0x1:
- DECODE_PRINTF("JNO\t");
- return !ACCESS_FLAG(F_OF);
- break;
- case 0x2:
- DECODE_PRINTF("JB\t");
- return ACCESS_FLAG(F_CF);
- break;
- case 0x3:
- DECODE_PRINTF("JNB\t");
- return !ACCESS_FLAG(F_CF);
- break;
- case 0x4:
- DECODE_PRINTF("JZ\t");
- return ACCESS_FLAG(F_ZF);
- break;
- case 0x5:
- DECODE_PRINTF("JNZ\t");
- return !ACCESS_FLAG(F_ZF);
- break;
- case 0x6:
- DECODE_PRINTF("JBE\t");
- return ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
- break;
- case 0x7:
- DECODE_PRINTF("JNBE\t");
- return !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
- break;
- case 0x8:
- DECODE_PRINTF("JS\t");
- return ACCESS_FLAG(F_SF);
- break;
- case 0x9:
- DECODE_PRINTF("JNS\t");
- return !ACCESS_FLAG(F_SF);
- break;
- case 0xa:
- DECODE_PRINTF("JP\t");
- return ACCESS_FLAG(F_PF);
- break;
- case 0xb:
- DECODE_PRINTF("JNP\t");
- return !ACCESS_FLAG(F_PF);
- break;
- case 0xc:
- DECODE_PRINTF("JL\t");
- return xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
- break;
- case 0xd:
- DECODE_PRINTF("JNL\t");
- return !xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
- break;
- case 0xe:
- DECODE_PRINTF("JLE\t");
- return (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
- ACCESS_FLAG(F_ZF));
- break;
- default:
- DECODE_PRINTF("JNLE\t");
- return !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
- ACCESS_FLAG(F_ZF));
- }
+ switch (op) {
+ case 0x0:
+ DECODE_PRINTF("JO\t");
+ return ACCESS_FLAG(F_OF);
+ case 0x1:
+ DECODE_PRINTF("JNO\t");
+ return !ACCESS_FLAG(F_OF);
+ break;
+ case 0x2:
+ DECODE_PRINTF("JB\t");
+ return ACCESS_FLAG(F_CF);
+ break;
+ case 0x3:
+ DECODE_PRINTF("JNB\t");
+ return !ACCESS_FLAG(F_CF);
+ break;
+ case 0x4:
+ DECODE_PRINTF("JZ\t");
+ return ACCESS_FLAG(F_ZF);
+ break;
+ case 0x5:
+ DECODE_PRINTF("JNZ\t");
+ return !ACCESS_FLAG(F_ZF);
+ break;
+ case 0x6:
+ DECODE_PRINTF("JBE\t");
+ return ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
+ break;
+ case 0x7:
+ DECODE_PRINTF("JNBE\t");
+ return !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
+ break;
+ case 0x8:
+ DECODE_PRINTF("JS\t");
+ return ACCESS_FLAG(F_SF);
+ break;
+ case 0x9:
+ DECODE_PRINTF("JNS\t");
+ return !ACCESS_FLAG(F_SF);
+ break;
+ case 0xa:
+ DECODE_PRINTF("JP\t");
+ return ACCESS_FLAG(F_PF);
+ break;
+ case 0xb:
+ DECODE_PRINTF("JNP\t");
+ return !ACCESS_FLAG(F_PF);
+ break;
+ case 0xc:
+ DECODE_PRINTF("JL\t");
+ return xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
+ break;
+ case 0xd:
+ DECODE_PRINTF("JNL\t");
+ return !xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
+ break;
+ case 0xe:
+ DECODE_PRINTF("JLE\t");
+ return (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
+ ACCESS_FLAG(F_ZF));
+ break;
+ default:
+ DECODE_PRINTF("JNLE\t");
+ return !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
+ ACCESS_FLAG(F_ZF));
+ }
}
static void x86emuOp2_long_jump(u8 op2)
{
- s32 target;
- int cond;
+ s32 target;
+ int cond;
- /* conditional jump to word offset. */
- START_OF_INSTR();
- cond = x86emu_check_jump_condition(op2 & 0xF);
- target = (s16) fetch_word_imm();
- target += (s16) M.x86.R_IP;
- DECODE_PRINTF2("%04x\n", target);
- TRACE_AND_STEP();
- if (cond) {
- M.x86.R_IP = (u16)target;
- JMP_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, M.x86.R_IP, " LONG COND ");
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ /* conditional jump to word offset. */
+ START_OF_INSTR();
+ cond = x86emu_check_jump_condition(op2 & 0xF);
+ target = (s16) fetch_word_imm();
+ target += (s16) M.x86.R_IP;
+ DECODE_PRINTF2("%04x\n", target);
+ TRACE_AND_STEP();
+ if (cond) {
+ M.x86.R_IP = (u16) target;
+ JMP_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS,
+ M.x86.R_IP, " LONG COND ");
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -308,57 +309,55 @@
****************************************************************************/
static s32 x86emu_bswap(s32 reg)
{
- // perform the byte swap
- s32 temp = reg;
- reg = (temp & 0xFF000000) >> 24 |
- (temp & 0xFF0000) >> 8 |
- (temp & 0xFF00) << 8 |
- (temp & 0xFF) << 24;
- return reg;
+ // perform the byte swap
+ s32 temp = reg;
+ reg = (temp & 0xFF000000) >> 24 |
+ (temp & 0xFF0000) >> 8 | (temp & 0xFF00) << 8 | (temp & 0xFF) << 24;
+ return reg;
}
static void x86emuOp2_bswap(u8 op2)
{
- /* byte swap 32 bit register */
- START_OF_INSTR();
- DECODE_PRINTF("BSWAP\t");
- switch (op2) {
- case 0xc8:
- DECODE_PRINTF("EAX\n");
- M.x86.R_EAX = x86emu_bswap(M.x86.R_EAX);
- break;
- case 0xc9:
- DECODE_PRINTF("ECX\n");
- M.x86.R_ECX = x86emu_bswap(M.x86.R_ECX);
- break;
- case 0xca:
- DECODE_PRINTF("EDX\n");
- M.x86.R_EDX = x86emu_bswap(M.x86.R_EDX);
- break;
- case 0xcb:
- DECODE_PRINTF("EBX\n");
- M.x86.R_EBX = x86emu_bswap(M.x86.R_EBX);
- break;
- case 0xcc:
- DECODE_PRINTF("ESP\n");
- M.x86.R_ESP = x86emu_bswap(M.x86.R_ESP);
- break;
- case 0xcd:
- DECODE_PRINTF("EBP\n");
- M.x86.R_EBP = x86emu_bswap(M.x86.R_EBP);
- break;
- case 0xce:
- DECODE_PRINTF("ESI\n");
- M.x86.R_ESI = x86emu_bswap(M.x86.R_ESI);
- break;
- case 0xcf:
- DECODE_PRINTF("EDI\n");
- M.x86.R_EDI = x86emu_bswap(M.x86.R_EDI);
- break;
- }
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ /* byte swap 32 bit register */
+ START_OF_INSTR();
+ DECODE_PRINTF("BSWAP\t");
+ switch (op2) {
+ case 0xc8:
+ DECODE_PRINTF("EAX\n");
+ M.x86.R_EAX = x86emu_bswap(M.x86.R_EAX);
+ break;
+ case 0xc9:
+ DECODE_PRINTF("ECX\n");
+ M.x86.R_ECX = x86emu_bswap(M.x86.R_ECX);
+ break;
+ case 0xca:
+ DECODE_PRINTF("EDX\n");
+ M.x86.R_EDX = x86emu_bswap(M.x86.R_EDX);
+ break;
+ case 0xcb:
+ DECODE_PRINTF("EBX\n");
+ M.x86.R_EBX = x86emu_bswap(M.x86.R_EBX);
+ break;
+ case 0xcc:
+ DECODE_PRINTF("ESP\n");
+ M.x86.R_ESP = x86emu_bswap(M.x86.R_ESP);
+ break;
+ case 0xcd:
+ DECODE_PRINTF("EBP\n");
+ M.x86.R_EBP = x86emu_bswap(M.x86.R_EBP);
+ break;
+ case 0xce:
+ DECODE_PRINTF("ESI\n");
+ M.x86.R_ESI = x86emu_bswap(M.x86.R_ESI);
+ break;
+ case 0xcf:
+ DECODE_PRINTF("EDI\n");
+ M.x86.R_EDI = x86emu_bswap(M.x86.R_EDI);
+ break;
+ }
+ TRACE_AND_STEP();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -367,94 +366,94 @@
****************************************************************************/
static void x86emuOp2_set_byte(u8 op2)
{
- int mod, rl, rh;
- uint destoffset;
- u8 *destreg;
- const char *X86EMU_DEBUG_ONLY(name) = NULL;
- int cond = 0;
+ int mod, rl, rh;
+ uint destoffset;
+ u8 *destreg;
+ const char *X86EMU_DEBUG_ONLY(name) = NULL;
+ int cond = 0;
- START_OF_INSTR();
- switch (op2) {
- case 0x90:
- name = "SETO\t";
- cond = ACCESS_FLAG(F_OF);
- break;
- case 0x91:
- name = "SETNO\t";
- cond = !ACCESS_FLAG(F_OF);
- break;
- case 0x92:
- name = "SETB\t";
- cond = ACCESS_FLAG(F_CF);
- break;
- case 0x93:
- name = "SETNB\t";
- cond = !ACCESS_FLAG(F_CF);
- break;
- case 0x94:
- name = "SETZ\t";
- cond = ACCESS_FLAG(F_ZF);
- break;
- case 0x95:
- name = "SETNZ\t";
- cond = !ACCESS_FLAG(F_ZF);
- break;
- case 0x96:
- name = "SETBE\t";
- cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
- break;
- case 0x97:
- name = "SETNBE\t";
- cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
- break;
- case 0x98:
- name = "SETS\t";
- cond = ACCESS_FLAG(F_SF);
- break;
- case 0x99:
- name = "SETNS\t";
- cond = !ACCESS_FLAG(F_SF);
- break;
- case 0x9a:
- name = "SETP\t";
- cond = ACCESS_FLAG(F_PF);
- break;
- case 0x9b:
- name = "SETNP\t";
- cond = !ACCESS_FLAG(F_PF);
- break;
- case 0x9c:
- name = "SETL\t";
- cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
- break;
- case 0x9d:
- name = "SETNL\t";
- cond = !xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
- break;
- case 0x9e:
- name = "SETLE\t";
- cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
- ACCESS_FLAG(F_ZF));
- break;
- case 0x9f:
- name = "SETNLE\t";
- cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
- ACCESS_FLAG(F_ZF));
- break;
- }
- DECODE_PRINTF(name);
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- destoffset = decode_rmXX_address(mod, rl);
- TRACE_AND_STEP();
- store_data_byte(destoffset, cond ? 0x01 : 0x00);
- } else { /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- TRACE_AND_STEP();
- *destreg = cond ? 0x01 : 0x00;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ START_OF_INSTR();
+ switch (op2) {
+ case 0x90:
+ name = "SETO\t";
+ cond = ACCESS_FLAG(F_OF);
+ break;
+ case 0x91:
+ name = "SETNO\t";
+ cond = !ACCESS_FLAG(F_OF);
+ break;
+ case 0x92:
+ name = "SETB\t";
+ cond = ACCESS_FLAG(F_CF);
+ break;
+ case 0x93:
+ name = "SETNB\t";
+ cond = !ACCESS_FLAG(F_CF);
+ break;
+ case 0x94:
+ name = "SETZ\t";
+ cond = ACCESS_FLAG(F_ZF);
+ break;
+ case 0x95:
+ name = "SETNZ\t";
+ cond = !ACCESS_FLAG(F_ZF);
+ break;
+ case 0x96:
+ name = "SETBE\t";
+ cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
+ break;
+ case 0x97:
+ name = "SETNBE\t";
+ cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
+ break;
+ case 0x98:
+ name = "SETS\t";
+ cond = ACCESS_FLAG(F_SF);
+ break;
+ case 0x99:
+ name = "SETNS\t";
+ cond = !ACCESS_FLAG(F_SF);
+ break;
+ case 0x9a:
+ name = "SETP\t";
+ cond = ACCESS_FLAG(F_PF);
+ break;
+ case 0x9b:
+ name = "SETNP\t";
+ cond = !ACCESS_FLAG(F_PF);
+ break;
+ case 0x9c:
+ name = "SETL\t";
+ cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
+ break;
+ case 0x9d:
+ name = "SETNL\t";
+ cond = !xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
+ break;
+ case 0x9e:
+ name = "SETLE\t";
+ cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
+ ACCESS_FLAG(F_ZF));
+ break;
+ case 0x9f:
+ name = "SETNLE\t";
+ cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
+ ACCESS_FLAG(F_ZF));
+ break;
+ }
+ DECODE_PRINTF(name);
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ TRACE_AND_STEP();
+ store_data_byte(destoffset, cond ? 0x01 : 0x00);
+ } else { /* register to register */
+ destreg = DECODE_RM_BYTE_REGISTER(rl);
+ TRACE_AND_STEP();
+ *destreg = cond ? 0x01 : 0x00;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -463,12 +462,12 @@
****************************************************************************/
static void x86emuOp2_push_FS(u8 X86EMU_UNUSED(op2))
{
- START_OF_INSTR();
- DECODE_PRINTF("PUSH\tFS\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_FS);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ START_OF_INSTR();
+ DECODE_PRINTF("PUSH\tFS\n");
+ TRACE_AND_STEP();
+ push_word(M.x86.R_FS);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -477,12 +476,12 @@
****************************************************************************/
static void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
{
- START_OF_INSTR();
- DECODE_PRINTF("POP\tFS\n");
- TRACE_AND_STEP();
- M.x86.R_FS = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ START_OF_INSTR();
+ DECODE_PRINTF("POP\tFS\n");
+ TRACE_AND_STEP();
+ M.x86.R_FS = pop_word();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -491,12 +490,12 @@
****************************************************************************/
static void x86emuOp2_cpuid(u8 X86EMU_UNUSED(op2))
{
- START_OF_INSTR();
- DECODE_PRINTF("CPUID\n");
- TRACE_AND_STEP();
- x86emu_cpuid();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ START_OF_INSTR();
+ DECODE_PRINTF("CPUID\n");
+ TRACE_AND_STEP();
+ x86emu_cpuid();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -505,61 +504,61 @@
****************************************************************************/
static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint srcoffset;
- int bit,disp;
+ int mod, rl, rh;
+ uint srcoffset;
+ int bit, disp;
- START_OF_INSTR();
- DECODE_PRINTF("BT\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- srcoffset = decode_rmXX_address(mod, rl);
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval;
- u32 *shiftreg;
+ START_OF_INSTR();
+ DECODE_PRINTF("BT\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval;
+ u32 *shiftreg;
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- } else {
- u16 srcval;
- u16 *shiftreg;
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit), F_CF);
+ } else {
+ u16 srcval;
+ u16 *shiftreg;
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- }
- } else { /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit), F_CF);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg, *shiftreg;
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
- } else {
- u16 *srcreg,*shiftreg;
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit), F_CF);
+ } else {
+ u16 *srcreg, *shiftreg;
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit), F_CF);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -568,69 +567,69 @@
****************************************************************************/
static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint destoffset;
- u8 shift;
+ int mod, rl, rh;
+ uint destoffset;
+ u8 shift;
- START_OF_INSTR();
- DECODE_PRINTF("SHLD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- destoffset = decode_rmXX_address(mod, rl);
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
+ START_OF_INSTR();
+ DECODE_PRINTF("SHLD\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+ u32 *shiftreg;
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,shift);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ destval = fetch_data_long(destoffset);
+ destval = shld_long(destval, *shiftreg, shift);
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval;
+ u16 *shiftreg;
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,shift);
- store_data_word(destoffset, destval);
- }
- } else { /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ destval = fetch_data_word(destoffset);
+ destval = shld_word(destval, *shiftreg, shift);
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg, *shiftreg;
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- *destreg = shld_long(*destreg,*shiftreg,shift);
- } else {
- u16 *destreg,*shiftreg;
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ *destreg = shld_long(*destreg, *shiftreg, shift);
+ } else {
+ u16 *destreg, *shiftreg;
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- *destreg = shld_word(*destreg,*shiftreg,shift);
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ *destreg = shld_word(*destreg, *shiftreg, shift);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -639,60 +638,60 @@
****************************************************************************/
static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint destoffset;
+ int mod, rl, rh;
+ uint destoffset;
- START_OF_INSTR();
- DECODE_PRINTF("SHLD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- destoffset = decode_rmXX_address(mod, rl);
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
+ START_OF_INSTR();
+ DECODE_PRINTF("SHLD\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+ u32 *shiftreg;
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,M.x86.R_CL);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ destval = fetch_data_long(destoffset);
+ destval = shld_long(destval, *shiftreg, M.x86.R_CL);
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval;
+ u16 *shiftreg;
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,M.x86.R_CL);
- store_data_word(destoffset, destval);
- }
- } else { /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ destval = fetch_data_word(destoffset);
+ destval = shld_word(destval, *shiftreg, M.x86.R_CL);
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg, *shiftreg;
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = shld_long(*destreg,*shiftreg,M.x86.R_CL);
- } else {
- u16 *destreg,*shiftreg;
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ *destreg = shld_long(*destreg, *shiftreg, M.x86.R_CL);
+ } else {
+ u16 *destreg, *shiftreg;
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = shld_word(*destreg,*shiftreg,M.x86.R_CL);
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ *destreg = shld_word(*destreg, *shiftreg, M.x86.R_CL);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -701,12 +700,12 @@
****************************************************************************/
static void x86emuOp2_push_GS(u8 X86EMU_UNUSED(op2))
{
- START_OF_INSTR();
- DECODE_PRINTF("PUSH\tGS\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_GS);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ START_OF_INSTR();
+ DECODE_PRINTF("PUSH\tGS\n");
+ TRACE_AND_STEP();
+ push_word(M.x86.R_GS);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -715,12 +714,12 @@
****************************************************************************/
static void x86emuOp2_pop_GS(u8 X86EMU_UNUSED(op2))
{
- START_OF_INSTR();
- DECODE_PRINTF("POP\tGS\n");
- TRACE_AND_STEP();
- M.x86.R_GS = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ START_OF_INSTR();
+ DECODE_PRINTF("POP\tGS\n");
+ TRACE_AND_STEP();
+ M.x86.R_GS = pop_word();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -729,71 +728,71 @@
****************************************************************************/
static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint srcoffset;
- int bit,disp;
+ int mod, rl, rh;
+ uint srcoffset;
+ int bit, disp;
- START_OF_INSTR();
- DECODE_PRINTF("BTS\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- srcoffset = decode_rmXX_address(mod, rl);
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
+ START_OF_INSTR();
+ DECODE_PRINTF("BTS\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, mask;
+ u32 *shiftreg;
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval | mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_long(srcoffset + disp, srcval | mask);
+ } else {
+ u16 srcval, mask;
+ u16 *shiftreg;
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, srcval | mask);
- }
- } else { /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
- u32 mask;
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_word(srcoffset + disp, srcval | mask);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg, *shiftreg;
+ u32 mask;
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg |= mask;
- } else {
- u16 *srcreg,*shiftreg;
- u16 mask;
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
+ *srcreg |= mask;
+ } else {
+ u16 *srcreg, *shiftreg;
+ u16 mask;
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg |= mask;
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
+ *srcreg |= mask;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -802,69 +801,69 @@
****************************************************************************/
static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint destoffset;
- u8 shift;
+ int mod, rl, rh;
+ uint destoffset;
+ u8 shift;
- START_OF_INSTR();
- DECODE_PRINTF("SHLD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- destoffset = decode_rmXX_address(mod, rl);
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
+ START_OF_INSTR();
+ DECODE_PRINTF("SHLD\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+ u32 *shiftreg;
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,shift);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ destval = fetch_data_long(destoffset);
+ destval = shrd_long(destval, *shiftreg, shift);
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval;
+ u16 *shiftreg;
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,shift);
- store_data_word(destoffset, destval);
- }
- } else { /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ destval = fetch_data_word(destoffset);
+ destval = shrd_word(destval, *shiftreg, shift);
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg, *shiftreg;
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- *destreg = shrd_long(*destreg,*shiftreg,shift);
- } else {
- u16 *destreg,*shiftreg;
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ *destreg = shrd_long(*destreg, *shiftreg, shift);
+ } else {
+ u16 *destreg, *shiftreg;
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- *destreg = shrd_word(*destreg,*shiftreg,shift);
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ *destreg = shrd_word(*destreg, *shiftreg, shift);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -873,59 +872,59 @@
****************************************************************************/
static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint destoffset;
+ int mod, rl, rh;
+ uint destoffset;
- START_OF_INSTR();
- DECODE_PRINTF("SHLD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- destoffset = decode_rmXX_address(mod, rl);
- DECODE_PRINTF(",");
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
+ START_OF_INSTR();
+ DECODE_PRINTF("SHLD\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+ u32 *shiftreg;
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ destval = fetch_data_long(destoffset);
+ destval = shrd_long(destval, *shiftreg, M.x86.R_CL);
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval;
+ u16 *shiftreg;
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
- store_data_word(destoffset, destval);
- }
- } else { /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ destval = fetch_data_word(destoffset);
+ destval = shrd_word(destval, *shiftreg, M.x86.R_CL);
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg, *shiftreg;
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = shrd_long(*destreg,*shiftreg,M.x86.R_CL);
- } else {
- u16 *destreg,*shiftreg;
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ *destreg = shrd_long(*destreg, *shiftreg, M.x86.R_CL);
+ } else {
+ u16 *destreg, *shiftreg;
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = shrd_word(*destreg,*shiftreg,M.x86.R_CL);
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ *destreg = shrd_word(*destreg, *shiftreg, M.x86.R_CL);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -934,90 +933,92 @@
****************************************************************************/
static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint srcoffset;
+ int mod, rl, rh;
+ uint srcoffset;
- START_OF_INSTR();
- DECODE_PRINTF("IMUL\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
+ START_OF_INSTR();
+ DECODE_PRINTF("IMUL\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u32 srcval;
+ u32 res_lo, res_hi;
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rmXX_address(mod, rl);
- srcval = fetch_data_long(srcoffset);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = fetch_data_long(srcoffset);
+ TRACE_AND_STEP();
+ imul_long_direct(&res_lo, &res_hi, (s32) * destreg,
+ (s32) srcval);
+ if (res_hi != 0) {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ } else {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ }
+ *destreg = (u32) res_lo;
+ } else {
+ u16 *destreg;
+ u16 srcval;
+ u32 res;
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rmXX_address(mod, rl);
- srcval = fetch_data_word(srcoffset);
- TRACE_AND_STEP();
- res = (s16)*destreg * (s16)srcval;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- } else { /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
- u32 res_lo,res_hi;
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = fetch_data_word(srcoffset);
+ TRACE_AND_STEP();
+ res = (s16) * destreg * (s16) srcval;
+ if (res > 0xFFFF) {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ } else {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ }
+ *destreg = (u16) res;
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg, *srcreg;
+ u32 res_lo, res_hi;
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)*srcreg);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg,*srcreg;
- u32 res;
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ TRACE_AND_STEP();
+ imul_long_direct(&res_lo, &res_hi, (s32) * destreg,
+ (s32) * srcreg);
+ if (res_hi != 0) {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ } else {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ }
+ *destreg = (u32) res_lo;
+ } else {
+ u16 *destreg, *srcreg;
+ u32 res;
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- res = (s16)*destreg * (s16)*srcreg;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ res = (s16) * destreg * (s16) * srcreg;
+ if (res > 0xFFFF) {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ } else {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ }
+ *destreg = (u16) res;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -1026,27 +1027,27 @@
****************************************************************************/
static void x86emuOp2_lss_R_IMM(u8 X86EMU_UNUSED(op2))
{
- int mod, rh, rl;
- u16 *dstreg;
- uint srcoffset;
+ int mod, rh, rl;
+ u16 *dstreg;
+ uint srcoffset;
- START_OF_INSTR();
- DECODE_PRINTF("LSS\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rmXX_address(mod, rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_SS = fetch_data_word(srcoffset + 2);
- } else { /* register to register */
- /* UNDEFINED! */
- TRACE_AND_STEP();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ START_OF_INSTR();
+ DECODE_PRINTF("LSS\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *dstreg = fetch_data_word(srcoffset);
+ M.x86.R_SS = fetch_data_word(srcoffset + 2);
+ } else { /* register to register */
+ /* UNDEFINED! */
+ TRACE_AND_STEP();
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -1055,70 +1056,71 @@
****************************************************************************/
static void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint srcoffset;
- int bit,disp;
+ int mod, rl, rh;
+ uint srcoffset;
+ int bit, disp;
- START_OF_INSTR();
- DECODE_PRINTF("BTR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- srcoffset = decode_rmXX_address(mod, rl);
- DECODE_PRINTF(",");
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
+ START_OF_INSTR();
+ DECODE_PRINTF("BTR\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, mask;
+ u32 *shiftreg;
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval & ~mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_long(srcoffset + disp, srcval & ~mask);
+ } else {
+ u16 srcval, mask;
+ u16 *shiftreg;
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
- }
- } else { /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
- u32 mask;
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_word(srcoffset + disp,
+ (u16) (srcval & ~mask));
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg, *shiftreg;
+ u32 mask;
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg &= ~mask;
- } else {
- u16 *srcreg,*shiftreg;
- u16 mask;
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
+ *srcreg &= ~mask;
+ } else {
+ u16 *srcreg, *shiftreg;
+ u16 mask;
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg &= ~mask;
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
+ *srcreg &= ~mask;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -1127,27 +1129,27 @@
****************************************************************************/
static void x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2))
{
- int mod, rh, rl;
- u16 *dstreg;
- uint srcoffset;
+ int mod, rh, rl;
+ u16 *dstreg;
+ uint srcoffset;
- START_OF_INSTR();
- DECODE_PRINTF("LFS\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rmXX_address(mod, rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_FS = fetch_data_word(srcoffset + 2);
- } else { /* register to register */
- /* UNDEFINED! */
- TRACE_AND_STEP();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ START_OF_INSTR();
+ DECODE_PRINTF("LFS\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *dstreg = fetch_data_word(srcoffset);
+ M.x86.R_FS = fetch_data_word(srcoffset + 2);
+ } else { /* register to register */
+ /* UNDEFINED! */
+ TRACE_AND_STEP();
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -1156,27 +1158,27 @@
****************************************************************************/
static void x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2))
{
- int mod, rh, rl;
- u16 *dstreg;
- uint srcoffset;
+ int mod, rh, rl;
+ u16 *dstreg;
+ uint srcoffset;
- START_OF_INSTR();
- DECODE_PRINTF("LGS\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rmXX_address(mod, rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_GS = fetch_data_word(srcoffset + 2);
- } else { /* register to register */
- /* UNDEFINED! */
- TRACE_AND_STEP();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ START_OF_INSTR();
+ DECODE_PRINTF("LGS\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *dstreg = fetch_data_word(srcoffset);
+ M.x86.R_GS = fetch_data_word(srcoffset + 2);
+ } else { /* register to register */
+ /* UNDEFINED! */
+ TRACE_AND_STEP();
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -1185,61 +1187,61 @@
****************************************************************************/
static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint srcoffset;
+ int mod, rl, rh;
+ uint srcoffset;
- START_OF_INSTR();
- DECODE_PRINTF("MOVZX\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
+ START_OF_INSTR();
+ DECODE_PRINTF("MOVZX\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u32 srcval;
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rmXX_address(mod, rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = fetch_data_byte(srcoffset);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ } else {
+ u16 *destreg;
+ u16 srcval;
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rmXX_address(mod, rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- } else { /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u8 *srcreg;
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = fetch_data_byte(srcoffset);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u8 *srcreg;
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- } else {
- u16 *destreg;
- u8 *srcreg;
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = *srcreg;
+ } else {
+ u16 *destreg;
+ u8 *srcreg;
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = *srcreg;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -1248,33 +1250,33 @@
****************************************************************************/
static void x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint srcoffset;
- u32 *destreg;
- u32 srcval;
- u16 *srcreg;
+ int mod, rl, rh;
+ uint srcoffset;
+ u32 *destreg;
+ u32 srcval;
+ u16 *srcreg;
- START_OF_INSTR();
- DECODE_PRINTF("MOVZX\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rmXX_address(mod, rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else { /* register to register */
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ START_OF_INSTR();
+ DECODE_PRINTF("MOVZX\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = fetch_data_word(srcoffset);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ } else { /* register to register */
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = *srcreg;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -1283,134 +1285,136 @@
****************************************************************************/
static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint srcoffset;
- u8 shift;
- int bit;
+ int mod, rl, rh;
+ uint srcoffset;
+ u8 shift;
+ int bit;
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (rh) {
- case 4:
- DECODE_PRINTF("BT\t");
- break;
- case 5:
- DECODE_PRINTF("BTS\t");
- break;
- case 6:
- DECODE_PRINTF("BTR\t");
- break;
- case 7:
- DECODE_PRINTF("BTC\t");
- break;
- default:
- DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
- TRACE_REGS();
- printf("%04x:%04x: %02X%02X ILLEGAL EXTENDED X86 OPCODE EXTENSION!\n",
- M.x86.R_CS, M.x86.R_IP-3,op2, (mod<<6)|(rh<<3)|rl);
- HALT_SYS();
- }
- if (mod < 3) {
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ switch (rh) {
+ case 4:
+ DECODE_PRINTF("BT\t");
+ break;
+ case 5:
+ DECODE_PRINTF("BTS\t");
+ break;
+ case 6:
+ DECODE_PRINTF("BTR\t");
+ break;
+ case 7:
+ DECODE_PRINTF("BTC\t");
+ break;
+ default:
+ DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
+ TRACE_REGS();
+ printf
+ ("%04x:%04x: %02X%02X ILLEGAL EXTENDED X86 OPCODE EXTENSION!\n",
+ M.x86.R_CS, M.x86.R_IP - 3, op2,
+ (mod << 6) | (rh << 3) | rl);
+ HALT_SYS();
+ }
+ if (mod < 3) {
- srcoffset = decode_rmXX_address(mod, rl);
- shift = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", shift);
- TRACE_AND_STEP();
+ srcoffset = decode_rmXX_address(mod, rl);
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2(",%d\n", shift);
+ TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, mask;
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, mask;
- bit = shift & 0x1F;
- srcval = fetch_data_long(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 5:
- store_data_long(srcoffset, srcval | mask);
- break;
- case 6:
- store_data_long(srcoffset, srcval & ~mask);
- break;
- case 7:
- store_data_long(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- } else {
- u16 srcval, mask;
+ bit = shift & 0x1F;
+ srcval = fetch_data_long(srcoffset);
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ switch (rh) {
+ case 5:
+ store_data_long(srcoffset, srcval | mask);
+ break;
+ case 6:
+ store_data_long(srcoffset, srcval & ~mask);
+ break;
+ case 7:
+ store_data_long(srcoffset, srcval ^ mask);
+ break;
+ default:
+ break;
+ }
+ } else {
+ u16 srcval, mask;
- bit = shift & 0xF;
- srcval = fetch_data_word(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 5:
- store_data_word(srcoffset, srcval | mask);
- break;
- case 6:
- store_data_word(srcoffset, srcval & ~mask);
- break;
- case 7:
- store_data_word(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- }
- } else { /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg;
- u32 mask;
+ bit = shift & 0xF;
+ srcval = fetch_data_word(srcoffset);
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ switch (rh) {
+ case 5:
+ store_data_word(srcoffset, srcval | mask);
+ break;
+ case 6:
+ store_data_word(srcoffset, srcval & ~mask);
+ break;
+ case 7:
+ store_data_word(srcoffset, srcval ^ mask);
+ break;
+ default:
+ break;
+ }
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg;
+ u32 mask;
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- shift = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", shift);
- TRACE_AND_STEP();
- bit = shift & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- switch (rh) {
- case 5:
- *srcreg |= mask;
- break;
- case 6:
- *srcreg &= ~mask;
- break;
- case 7:
- *srcreg ^= mask;
- break;
- default:
- break;
- }
- } else {
- u16 *srcreg;
- u16 mask;
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2(",%d\n", shift);
+ TRACE_AND_STEP();
+ bit = shift & 0x1F;
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
+ switch (rh) {
+ case 5:
+ *srcreg |= mask;
+ break;
+ case 6:
+ *srcreg &= ~mask;
+ break;
+ case 7:
+ *srcreg ^= mask;
+ break;
+ default:
+ break;
+ }
+ } else {
+ u16 *srcreg;
+ u16 mask;
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- shift = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", shift);
- TRACE_AND_STEP();
- bit = shift & 0xF;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- switch (rh) {
- case 5:
- *srcreg |= mask;
- break;
- case 6:
- *srcreg &= ~mask;
- break;
- case 7:
- *srcreg ^= mask;
- break;
- default:
- break;
- }
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2(",%d\n", shift);
+ TRACE_AND_STEP();
+ bit = shift & 0xF;
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
+ switch (rh) {
+ case 5:
+ *srcreg |= mask;
+ break;
+ case 6:
+ *srcreg &= ~mask;
+ break;
+ case 7:
+ *srcreg ^= mask;
+ break;
+ default:
+ break;
+ }
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -1419,70 +1423,71 @@
****************************************************************************/
static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint srcoffset;
- int bit,disp;
+ int mod, rl, rh;
+ uint srcoffset;
+ int bit, disp;
- START_OF_INSTR();
- DECODE_PRINTF("BTC\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- srcoffset = decode_rmXX_address(mod, rl);
- DECODE_PRINTF(",");
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
+ START_OF_INSTR();
+ DECODE_PRINTF("BTC\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, mask;
+ u32 *shiftreg;
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval ^ mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_long(srcoffset + disp, srcval ^ mask);
+ } else {
+ u16 srcval, mask;
+ u16 *shiftreg;
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
- }
- } else { /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
- u32 mask;
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_word(srcoffset + disp,
+ (u16) (srcval ^ mask));
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg, *shiftreg;
+ u32 mask;
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg ^= mask;
- } else {
- u16 *srcreg,*shiftreg;
- u16 mask;
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
+ *srcreg ^= mask;
+ } else {
+ u16 *srcreg, *shiftreg;
+ u16 mask;
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg ^= mask;
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
+ *srcreg ^= mask;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -1491,59 +1496,63 @@
****************************************************************************/
static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint srcoffset;
+ int mod, rl, rh;
+ uint srcoffset;
- START_OF_INSTR();
- DECODE_PRINTF("BSF\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- srcoffset = decode_rmXX_address(mod, rl);
- DECODE_PRINTF(",");
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
+ START_OF_INSTR();
+ DECODE_PRINTF("BSF\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, *dstreg;
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for (*dstreg = 0; *dstreg < 32; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_long(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 0; *dstreg < 32; (*dstreg)++)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ } else {
+ u16 srcval, *dstreg;
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for (*dstreg = 0; *dstreg < 16; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- }
- } else { /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_word(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 0; *dstreg < 16; (*dstreg)++)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, *dstreg;
- srcval = *DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for (*dstreg = 0; *dstreg < 32; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
+ srcval = *DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 0; *dstreg < 32; (*dstreg)++)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ } else {
+ u16 srcval, *dstreg;
- srcval = *DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for (*dstreg = 0; *dstreg < 16; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ srcval = *DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 0; *dstreg < 16; (*dstreg)++)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -1552,59 +1561,63 @@
****************************************************************************/
static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint srcoffset;
+ int mod, rl, rh;
+ uint srcoffset;
- START_OF_INSTR();
- DECODE_PRINTF("BSR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- srcoffset = decode_rmXX_address(mod, rl);
- DECODE_PRINTF(",");
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
+ START_OF_INSTR();
+ DECODE_PRINTF("BSR\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, *dstreg;
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for (*dstreg = 31; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_long(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 31; *dstreg > 0; (*dstreg)--)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ } else {
+ u16 srcval, *dstreg;
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for (*dstreg = 15; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- }
- } else { /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_word(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 15; *dstreg > 0; (*dstreg)--)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, *dstreg;
- srcval = *DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for (*dstreg = 31; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
+ srcval = *DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 31; *dstreg > 0; (*dstreg)--)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ } else {
+ u16 srcval, *dstreg;
- srcval = *DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for (*dstreg = 15; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ srcval = *DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 15; *dstreg > 0; (*dstreg)--)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -1613,61 +1626,61 @@
****************************************************************************/
static void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint srcoffset;
+ int mod, rl, rh;
+ uint srcoffset;
- START_OF_INSTR();
- DECODE_PRINTF("MOVSX\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
+ START_OF_INSTR();
+ DECODE_PRINTF("MOVSX\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u32 srcval;
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rmXX_address(mod, rl);
- srcval = (s32)((s8)fetch_data_byte(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = (s32) ((s8) fetch_data_byte(srcoffset));
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ } else {
+ u16 *destreg;
+ u16 srcval;
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rmXX_address(mod, rl);
- srcval = (s16)((s8)fetch_data_byte(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- } else { /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u8 *srcreg;
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = (s16) ((s8) fetch_data_byte(srcoffset));
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u8 *srcreg;
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = (s32)((s8)*srcreg);
- } else {
- u16 *destreg;
- u8 *srcreg;
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = (s32) ((s8) * srcreg);
+ } else {
+ u16 *destreg;
+ u8 *srcreg;
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = (s16)((s8)*srcreg);
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = (s16) ((s8) * srcreg);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
@@ -1676,57 +1689,55 @@
****************************************************************************/
static void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint srcoffset;
- u32 *destreg;
- u32 srcval;
- u16 *srcreg;
+ int mod, rl, rh;
+ uint srcoffset;
+ u32 *destreg;
+ u32 srcval;
+ u16 *srcreg;
- START_OF_INSTR();
- DECODE_PRINTF("MOVSX\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (mod < 3) {
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rmXX_address(mod, rl);
- srcval = (s32)((s16)fetch_data_word(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else { /* register to register */
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = (s32)((s16)*srcreg);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ START_OF_INSTR();
+ DECODE_PRINTF("MOVSX\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = (s32) ((s16) fetch_data_word(srcoffset));
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ } else { /* register to register */
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = (s32) ((s16) * srcreg);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/***************************************************************************
* Double byte operation code table:
**************************************************************************/
-void (*x86emu_optab2[256])(u8) =
-{
-/* 0x00 */ x86emuOp2_illegal_op, /* Group F (ring 0 PM) */
-/* 0x01 */ x86emuOp2_opc_01, /* Group G (ring 0 PM) */
-/* 0x02 */ x86emuOp2_illegal_op, /* lar (ring 0 PM) */
-/* 0x03 */ x86emuOp2_illegal_op, /* lsl (ring 0 PM) */
+void (*x86emu_optab2[256]) (u8) = {
+/* 0x00 */ x86emuOp2_illegal_op, /* Group F (ring 0 PM) */
+/* 0x01 */ x86emuOp2_opc_01, /* Group G (ring 0 PM) */
+/* 0x02 */ x86emuOp2_illegal_op, /* lar (ring 0 PM) */
+/* 0x03 */ x86emuOp2_illegal_op, /* lsl (ring 0 PM) */
/* 0x04 */ x86emuOp2_illegal_op,
-/* 0x05 */ x86emuOp2_illegal_op, /* loadall (undocumented) */
-/* 0x06 */ x86emuOp2_illegal_op, /* clts (ring 0 PM) */
-/* 0x07 */ x86emuOp2_illegal_op, /* loadall (undocumented) */
-/* 0x08 */ x86emuOp2_invd, /* invd (ring 0 PM) */
-/* 0x09 */ x86emuOp2_wbinvd, /* wbinvd (ring 0 PM) */
+/* 0x05 */ x86emuOp2_illegal_op, /* loadall (undocumented) */
+/* 0x06 */ x86emuOp2_illegal_op, /* clts (ring 0 PM) */
+/* 0x07 */ x86emuOp2_illegal_op, /* loadall (undocumented) */
+/* 0x08 */ x86emuOp2_invd, /* invd (ring 0 PM) */
+/* 0x09 */ x86emuOp2_wbinvd, /* wbinvd (ring 0 PM) */
/* 0x0a */ x86emuOp2_illegal_op,
/* 0x0b */ x86emuOp2_illegal_op,
/* 0x0c */ x86emuOp2_illegal_op,
/* 0x0d */ x86emuOp2_illegal_op,
/* 0x0e */ x86emuOp2_illegal_op,
/* 0x0f */ x86emuOp2_illegal_op,
-
/* 0x10 */ x86emuOp2_illegal_op,
/* 0x11 */ x86emuOp2_illegal_op,
/* 0x12 */ x86emuOp2_illegal_op,
@@ -1743,14 +1754,13 @@
/* 0x1d */ x86emuOp2_illegal_op,
/* 0x1e */ x86emuOp2_illegal_op,
/* 0x1f */ x86emuOp2_illegal_op,
-
-/* 0x20 */ x86emuOp2_illegal_op, /* mov reg32,creg (ring 0 PM) */
-/* 0x21 */ x86emuOp2_illegal_op, /* mov reg32,dreg (ring 0 PM) */
-/* 0x22 */ x86emuOp2_illegal_op, /* mov creg,reg32 (ring 0 PM) */
-/* 0x23 */ x86emuOp2_illegal_op, /* mov dreg,reg32 (ring 0 PM) */
-/* 0x24 */ x86emuOp2_illegal_op, /* mov reg32,treg (ring 0 PM) */
+/* 0x20 */ x86emuOp2_illegal_op, /* mov reg32,creg (ring 0 PM) */
+/* 0x21 */ x86emuOp2_illegal_op, /* mov reg32,dreg (ring 0 PM) */
+/* 0x22 */ x86emuOp2_illegal_op, /* mov creg,reg32 (ring 0 PM) */
+/* 0x23 */ x86emuOp2_illegal_op, /* mov dreg,reg32 (ring 0 PM) */
+/* 0x24 */ x86emuOp2_illegal_op, /* mov reg32,treg (ring 0 PM) */
/* 0x25 */ x86emuOp2_illegal_op,
-/* 0x26 */ x86emuOp2_illegal_op, /* mov treg,reg32 (ring 0 PM) */
+/* 0x26 */ x86emuOp2_illegal_op, /* mov treg,reg32 (ring 0 PM) */
/* 0x27 */ x86emuOp2_illegal_op,
/* 0x28 */ x86emuOp2_illegal_op,
/* 0x29 */ x86emuOp2_illegal_op,
@@ -1760,7 +1770,6 @@
/* 0x2d */ x86emuOp2_illegal_op,
/* 0x2e */ x86emuOp2_illegal_op,
/* 0x2f */ x86emuOp2_illegal_op,
-
/* 0x30 */ x86emuOp2_wrmsr,
/* 0x31 */ x86emuOp2_rdtsc,
/* 0x32 */ x86emuOp2_rdmsr,
@@ -1777,7 +1786,6 @@
/* 0x3d */ x86emuOp2_illegal_op,
/* 0x3e */ x86emuOp2_illegal_op,
/* 0x3f */ x86emuOp2_illegal_op,
-
/* 0x40 */ x86emuOp2_illegal_op,
/* 0x41 */ x86emuOp2_illegal_op,
/* 0x42 */ x86emuOp2_illegal_op,
@@ -1794,7 +1802,6 @@
/* 0x4d */ x86emuOp2_illegal_op,
/* 0x4e */ x86emuOp2_illegal_op,
/* 0x4f */ x86emuOp2_illegal_op,
-
/* 0x50 */ x86emuOp2_illegal_op,
/* 0x51 */ x86emuOp2_illegal_op,
/* 0x52 */ x86emuOp2_illegal_op,
@@ -1811,7 +1818,6 @@
/* 0x5d */ x86emuOp2_illegal_op,
/* 0x5e */ x86emuOp2_illegal_op,
/* 0x5f */ x86emuOp2_illegal_op,
-
/* 0x60 */ x86emuOp2_illegal_op,
/* 0x61 */ x86emuOp2_illegal_op,
/* 0x62 */ x86emuOp2_illegal_op,
@@ -1828,7 +1834,6 @@
/* 0x6d */ x86emuOp2_illegal_op,
/* 0x6e */ x86emuOp2_illegal_op,
/* 0x6f */ x86emuOp2_illegal_op,
-
/* 0x70 */ x86emuOp2_illegal_op,
/* 0x71 */ x86emuOp2_illegal_op,
/* 0x72 */ x86emuOp2_illegal_op,
@@ -1845,7 +1850,6 @@
/* 0x7d */ x86emuOp2_illegal_op,
/* 0x7e */ x86emuOp2_illegal_op,
/* 0x7f */ x86emuOp2_illegal_op,
-
/* 0x80 */ x86emuOp2_long_jump,
/* 0x81 */ x86emuOp2_long_jump,
/* 0x82 */ x86emuOp2_long_jump,
@@ -1862,7 +1866,6 @@
/* 0x8d */ x86emuOp2_long_jump,
/* 0x8e */ x86emuOp2_long_jump,
/* 0x8f */ x86emuOp2_long_jump,
-
/* 0x90 */ x86emuOp2_set_byte,
/* 0x91 */ x86emuOp2_set_byte,
/* 0x92 */ x86emuOp2_set_byte,
@@ -1879,7 +1882,6 @@
/* 0x9d */ x86emuOp2_set_byte,
/* 0x9e */ x86emuOp2_set_byte,
/* 0x9f */ x86emuOp2_set_byte,
-
/* 0xa0 */ x86emuOp2_push_FS,
/* 0xa1 */ x86emuOp2_pop_FS,
/* 0xa2 */ x86emuOp2_cpuid,
@@ -1896,9 +1898,8 @@
/* 0xad */ x86emuOp2_shrd_CL,
/* 0xae */ x86emuOp2_illegal_op,
/* 0xaf */ x86emuOp2_imul_R_RM,
-
-/* 0xb0 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */
-/* 0xb1 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */
+/* 0xb0 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */
+/* 0xb1 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */
/* 0xb2 */ x86emuOp2_lss_R_IMM,
/* 0xb3 */ x86emuOp2_btr_R,
/* 0xb4 */ x86emuOp2_lfs_R_IMM,
@@ -1913,9 +1914,8 @@
/* 0xbd */ x86emuOp2_bsr,
/* 0xbe */ x86emuOp2_movsx_byte_R_RM,
/* 0xbf */ x86emuOp2_movsx_word_R_RM,
-
-/* 0xc0 */ x86emuOp2_illegal_op, /* TODO: xadd */
-/* 0xc1 */ x86emuOp2_illegal_op, /* TODO: xadd */
+/* 0xc0 */ x86emuOp2_illegal_op, /* TODO: xadd */
+/* 0xc1 */ x86emuOp2_illegal_op, /* TODO: xadd */
/* 0xc2 */ x86emuOp2_illegal_op,
/* 0xc3 */ x86emuOp2_illegal_op,
/* 0xc4 */ x86emuOp2_illegal_op,
@@ -1930,7 +1930,6 @@
/* 0xcd */ x86emuOp2_bswap,
/* 0xce */ x86emuOp2_bswap,
/* 0xcf */ x86emuOp2_bswap,
-
/* 0xd0 */ x86emuOp2_illegal_op,
/* 0xd1 */ x86emuOp2_illegal_op,
/* 0xd2 */ x86emuOp2_illegal_op,
@@ -1947,7 +1946,6 @@
/* 0xdd */ x86emuOp2_illegal_op,
/* 0xde */ x86emuOp2_illegal_op,
/* 0xdf */ x86emuOp2_illegal_op,
-
/* 0xe0 */ x86emuOp2_illegal_op,
/* 0xe1 */ x86emuOp2_illegal_op,
/* 0xe2 */ x86emuOp2_illegal_op,
@@ -1964,7 +1962,6 @@
/* 0xed */ x86emuOp2_illegal_op,
/* 0xee */ x86emuOp2_illegal_op,
/* 0xef */ x86emuOp2_illegal_op,
-
/* 0xf0 */ x86emuOp2_illegal_op,
/* 0xf1 */ x86emuOp2_illegal_op,
/* 0xf2 */ x86emuOp2_illegal_op,
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I687b288b2a77129f8dfab3c0f2696438e76310f7
Gerrit-Change-Number: 26359
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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