[coreboot-gerrit] Change in coreboot[master]: soc/intel/{cannonlake, skylake}: Select Gen-6 PCH binding for SKL/CNL

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/26349


Change subject: soc/intel/{cannonlake, skylake}: Select Gen-6 PCH binding for SKL/CNL
......................................................................

soc/intel/{cannonlake, skylake}: Select Gen-6 PCH binding for SKL/CNL

This patch creates a glue layer between SOC and common block IPs in terms
of PCH. All common IP blocks now can be selected based on
SOC_INTEL_COMMON_PCH_BASE config option.

BUG=none
BRANCH=b:78109109
TEST=Build and boot Cannonlake RVP and EVE.

Change-Id: I4e1f009489f2d8338ae94b78d7e9eb3f88a85d99
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/skylake/Kconfig
2 files changed, 2 insertions(+), 57 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/26349/1

diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 3a012a8..0c129a7 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -45,34 +45,8 @@
 	select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
 	select SOC_INTEL_COMMON_BLOCK
 	select SOC_INTEL_COMMON_BLOCK_ACPI
-	select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
-	select SOC_INTEL_COMMON_BLOCK_CPU
-	select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
-	select SOC_INTEL_COMMON_BLOCK_CSE
-	select SOC_INTEL_COMMON_BLOCK_DSP
-	select SOC_INTEL_COMMON_BLOCK_EBDA
-	select SOC_INTEL_COMMON_BLOCK_FAST_SPI
-	select SOC_INTEL_COMMON_BLOCK_GPIO
-	select SOC_INTEL_COMMON_BLOCK_GRAPHICS
 	select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
-	select SOC_INTEL_COMMON_BLOCK_ITSS
-	select SOC_INTEL_COMMON_BLOCK_I2C
-	select SOC_INTEL_COMMON_BLOCK_LPC
-	select SOC_INTEL_COMMON_BLOCK_LPSS
-	select SOC_INTEL_COMMON_BLOCK_P2SB
-	select SOC_INTEL_COMMON_BLOCK_PCR
-	select SOC_INTEL_COMMON_BLOCK_PMC
-	select SOC_INTEL_COMMON_BLOCK_RTC
-	select SOC_INTEL_COMMON_BLOCK_SA
-	select SOC_INTEL_COMMON_BLOCK_SATA
-	select SOC_INTEL_COMMON_BLOCK_SCS
-	select SOC_INTEL_COMMON_BLOCK_SMBUS
-	select SOC_INTEL_COMMON_BLOCK_SMM
-	select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
-	select SOC_INTEL_COMMON_BLOCK_SPI
-	select SOC_INTEL_COMMON_BLOCK_TIMER
-	select SOC_INTEL_COMMON_BLOCK_UART
-	select SOC_INTEL_COMMON_BLOCK_XDCI
+	select SOC_INTEL_COMMON_PCH_BASE
 	select SOC_INTEL_COMMON_NHLT
 	select SOC_INTEL_COMMON_RESET
 	select SSE2
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 90c7824..e504dc3 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -56,40 +56,11 @@
 	select SOC_INTEL_COMMON
 	select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
 	select SOC_INTEL_COMMON_BLOCK
-	select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
-	select SOC_INTEL_COMMON_BLOCK_CPU
-	select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
-	select SOC_INTEL_COMMON_BLOCK_CSE
-	select SOC_INTEL_COMMON_BLOCK_DSP
-	select SOC_INTEL_COMMON_BLOCK_EBDA
-	select SOC_INTEL_COMMON_BLOCK_FAST_SPI
-	select SOC_INTEL_COMMON_BLOCK_GPIO
 	select SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS
 	select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL
-	select SOC_INTEL_COMMON_BLOCK_GRAPHICS
 	select SOC_INTEL_COMMON_BLOCK_GSPI
-	select SOC_INTEL_COMMON_BLOCK_I2C
-	select SOC_INTEL_COMMON_BLOCK_ITSS
-	select SOC_INTEL_COMMON_BLOCK_LPC
-	select SOC_INTEL_COMMON_BLOCK_LPSS
-	select SOC_INTEL_COMMON_BLOCK_P2SB
-	select SOC_INTEL_COMMON_BLOCK_PCIE
-	select SOC_INTEL_COMMON_BLOCK_PCR
-	select SOC_INTEL_COMMON_BLOCK_PMC
-	select SOC_INTEL_COMMON_BLOCK_RTC
-	select SOC_INTEL_COMMON_BLOCK_SA
-	select SOC_INTEL_COMMON_BLOCK_SATA
-	select SOC_INTEL_COMMON_BLOCK_SCS
 	select SOC_INTEL_COMMON_BLOCK_SGX
-	select SOC_INTEL_COMMON_BLOCK_SMBUS
-	select SOC_INTEL_COMMON_BLOCK_SMM
-	select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
-	select SOC_INTEL_COMMON_BLOCK_SPI
-	select SOC_INTEL_COMMON_BLOCK_TIMER
-	select SOC_INTEL_COMMON_BLOCK_UART
-	select SOC_INTEL_COMMON_BLOCK_VMX
-	select SOC_INTEL_COMMON_BLOCK_XDCI
-	select SOC_INTEL_COMMON_BLOCK_XHCI
+	select SOC_INTEL_COMMON_PCH_BASE
 	select SOC_INTEL_COMMON_NHLT
 	select SOC_INTEL_COMMON_RESET
 	select SSE2

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I4e1f009489f2d8338ae94b78d7e9eb3f88a85d99
Gerrit-Change-Number: 26349
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
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