[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/cpu: Use core apic id to get cpu_index()

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/26346


Change subject: soc/intel/common/block/cpu: Use core apic id to get cpu_index()
......................................................................

soc/intel/common/block/cpu: Use core apic id to get cpu_index()

This cpu_index() implementation assumes that cpu_index() function might
always getting called from coreboot context (ESP stack pointer will always refer
to coreboot). This might not true incase of proposed PI spec MP_SERVICES_PPI
implementation, where FSP context (stack pointer refers to fsp) will request
to get cpu_index(), natural alignment logic will use ESP and retrieve
struct cpu_info *ci from (stack_top - 8 byte). This is not the place where
cpu_index is actually stored by ramstage c_start.S

Hence this patch tries to remove those dependencies while retriving cpu_index(),
rather it uses cpuid to fetch lapic id and matches with cpu_mp structure to get
correct cpu_index()

BRANCH=none
BUG=b:79562868
TEST=Ensures functions can be run on APs without any failure and cpu_index() also
provides correct index number.

Change-Id: I55023a3e0cf42f0496d45bc6af8ead447f402350
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
M src/cpu/x86/mp_init.c
M src/include/cpu/x86/mp.h
M src/soc/intel/common/block/cpu/cpulib.c
3 files changed, 23 insertions(+), 3 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/26346/1

diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index a696cd0..86be8a8 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -660,12 +660,12 @@
 }
 
 /* Returns APIC id for coreboot CPU number or < 0 on failure. */
-static int mp_get_apic_id(int cpu_slot)
+int mp_get_apic_id(int logical_cpu)
 {
-	if (cpu_slot >= CONFIG_MAX_CPUS || cpu_slot < 0)
+	if (logical_cpu >= CONFIG_MAX_CPUS || logical_cpu < 0)
 		return -1;
 
-	return cpus[cpu_slot].default_apic_id;
+	return cpus[logical_cpu].default_apic_id;
 }
 
 void smm_initiate_relocation_parallel(void)
diff --git a/src/include/cpu/x86/mp.h b/src/include/cpu/x86/mp.h
index c04252e..45da999 100644
--- a/src/include/cpu/x86/mp.h
+++ b/src/include/cpu/x86/mp.h
@@ -153,5 +153,7 @@
 void smm_initiate_relocation_parallel(void);
 /* Send SMI to self with single execution. */
 void smm_initiate_relocation(void);
+/* Get CPU Index based on apic id */
+int mp_get_apic_id(int logical_cpu);
 
 #endif /* _X86_MP_H_ */
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c
index c67904f..8e2289b 100644
--- a/src/soc/intel/common/block/cpu/cpulib.c
+++ b/src/soc/intel/common/block/cpu/cpulib.c
@@ -16,10 +16,13 @@
 
 #include <arch/acpigen.h>
 #include <arch/io.h>
+#include <arch/cpu.h>
 #include <console/console.h>
 #include <cpu/intel/turbo.h>
+#include <cpu/x86/lapic.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
+#include <cpu/x86/mp.h>
 #include <delay.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/fast_spi.h>
@@ -314,3 +317,18 @@
 			(msr_t) {.lo = 0xffffffff, .hi = 0xffffffff});
 	}
 }
+
+#if IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_PUBLISH_MP_SERVICES_PPI) && \
+		ENV_RAMSTAGE
+int cpu_index(void)
+{
+	int i;
+
+	for (i = 0; i < CONFIG_MAX_CPUS; i++) {
+		if (mp_get_apic_id(i) == lapicid()) {
+			return i;
+		}
+	}
+	return -1;
+}
+#endif

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I55023a3e0cf42f0496d45bc6af8ead447f402350
Gerrit-Change-Number: 26346
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
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