[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Bypass FSP's CpuMemorytest and PCIe power sequence

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26284 )

Change subject: soc/intel/apollolake: Bypass FSP's CpuMemorytest and PCIe power sequence
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Patch Set 8: Verified+1

Build Successful 

https://qa.coreboot.org/job/coreboot-checkpatch/26584/ : SUCCESS

https://qa.coreboot.org/job/coreboot-gerrit/72491/ : SUCCESS


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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I4fa7a73fbb4676bb7af2416c8a33bf10ef41dd53
Gerrit-Change-Number: 26284
Gerrit-PatchSet: 8
Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik at intel.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-CC: Aaron Durbin <adurbin at chromium.org>
Gerrit-Comment-Date: Wed, 16 May 2018 20:55:34 +0000
Gerrit-HasComments: No
Gerrit-HasLabels: Yes
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