[coreboot-gerrit] Change in coreboot[master]: device/pci: Add MSI-X helper functions

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/26329


Change subject: device/pci: Add MSI-X helper functions
......................................................................

device/pci: Add MSI-X helper functions

Basic PCI MSI-X table helper functions.
To be used on Cavium to configure MSI-X tables.

Change-Id: I94413712e7986efd17e6b11ba59f6eb390384c8c
Signed-off-by: Patrick Rudolph <patrick.rudolph at 9elements.com>
---
M src/device/pci_device.c
M src/include/device/pci.h
M src/include/device/pci_def.h
3 files changed, 63 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/26329/1

diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index c18f529..7df1031 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -338,6 +338,43 @@
 }
 
 /**
+ * Given a device, read the size of the MSI-X table.
+ *
+ * @param dev Pointer to the device structure.
+ * @return MSI-X table size or 0 if not MSI-X capable device
+ */
+size_t pci_msix_table_size(struct device *dev)
+{
+	const size_t pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
+	if (!pos)
+		return 0;
+
+	const u16 control = pci_read_config16(dev, pos + PCI_MSIX_FLAGS);
+	return (control & PCI_MSIX_FLAGS_QSIZE) + 1;
+}
+
+/**
+ * Given a device, return the table offset and bar the MSI-X tables resides in.
+ *
+ * @param dev Pointer to the device structure.
+ * @param offset Returned value gives the offset in bytes inside the bar
+ * @param bar The returned value is the bar the MSI-X table is located in
+ * @return Zero on success
+ */
+size_t pci_msix_table_bar(struct device *dev, u32 *offset, u8 *bar)
+{
+	const size_t pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
+	if (!pos || !offset || !bar)
+		return 1;
+
+	*offset = pci_read_config32(dev, pos + PCI_MSIX_TABLE);
+	*bar = (u8)(*offset & PCI_MSIX_FLAGS_BIRMASK);
+	*offset &= ~PCI_MSIX_FLAGS_BIRMASK;
+
+	return 0;
+}
+
+/**
  * Read the base address registers for a given device.
  *
  * @param dev Pointer to the dev structure.
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index 3cc2c64..46c5d12 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -56,6 +56,20 @@
 	const unsigned short *devices;
 };
 
+struct msix_entry {
+	union {
+		struct {
+			u32 lower_addr;
+			u32 upper_addr;
+		};
+		struct {
+			u64 addr;
+		};
+	};
+	u32 data;
+	u32 vec_control;
+};
+
 #ifdef __SIMPLE_DEVICE__
 #define __pci_driver __attribute__((unused))
 #else
@@ -104,6 +118,9 @@
 const char *get_pci_class_name(struct device *dev);
 const char *get_pci_subclass_name(struct device *dev);
 
+size_t pci_msix_table_size(struct device *dev);
+size_t pci_msix_table_bar(struct device *dev, u32 *offset, u8 *bar);
+
 #define PCI_IO_BRIDGE_ALIGN 4096
 #define PCI_MEM_BRIDGE_ALIGN (1024*1024)
 
diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h
index 60d9132..1a98d5f 100644
--- a/src/include/device/pci_def.h
+++ b/src/include/device/pci_def.h
@@ -292,6 +292,15 @@
 #define PCI_MSI_DATA_64		12	/* 16 bits of data for 64-bit devices */
 #define PCI_MSI_MASK_BIT	16	/* Mask bits register */
 
+/* MSI-X registers */
+#define PCI_MSIX_FLAGS		2
+#define  PCI_MSIX_FLAGS_QSIZE	0x7FF
+#define  PCI_MSIX_FLAGS_ENABLE	(1 << 15)
+#define  PCI_MSIX_FLAGS_MASKALL	(1 << 14)
+#define PCI_MSIX_TABLE		4
+#define PCI_MSIX_PBA		8
+#define  PCI_MSIX_FLAGS_BIRMASK	(7 << 0)
+
 /* CompactPCI Hotswap Register */
 
 #define PCI_CHSWP_CSR		2	/* Control and Status Register */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I94413712e7986efd17e6b11ba59f6eb390384c8c
Gerrit-Change-Number: 26329
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <patrick.rudolph at 9elements.com>
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