[coreboot-gerrit] Change in coreboot[master]: arch/x86: Use core apic id to get cpu_index()

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/26327


Change subject: arch/x86: Use core apic id to get cpu_index()
......................................................................

arch/x86: Use core apic id to get cpu_index()

coreboot x86 cpu_index() implementation has strong dependencies over stack natural
alignment which might not work if CONFIG_STACK_SIZE > natural alignment (4KiB).

This cpu_index() implementation has also assume that cpu_index() function might
always getting called from coreboot context (ESP stack pointer will always refer
to coreboot). This might not true incase of proposed PI spec MP_SERVICES_PPI
implementation, where FSP context (stack pointer refers to fsp) will request
to get cpu_index(), natural alignment logic will use ESP and retrieve
struct cpu_info *ci from (stack_top - 8 byte). This is not the place where
cpu_index is actually stored by ramstage c_start.S

Hence this patch tries to remove those dependencies while retriving cpu_index(),
rather it uses cpuid to fetch lapic id and matches with cpu_mp structure to get
correct cpu_index()

BRANCH=none
BUG=b:79562868
TEST=Ensures functions can be run on APs without any failiure and cpu_index() also
provides correct index number.

Change-Id: I52c2cc17d825a5dd53759df516c5b74d88fa0580
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
M src/arch/x86/cpu.c
M src/arch/x86/include/arch/cpu.h
M src/cpu/x86/mp_init.c
M src/include/cpu/x86/mp.h
4 files changed, 17 insertions(+), 7 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/26327/1

diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c
index 7a7c99b..aae7965 100644
--- a/src/arch/x86/cpu.c
+++ b/src/arch/x86/cpu.c
@@ -220,6 +220,18 @@
 	cpu->ops = driver ? driver->ops : NULL;
 }
 
+int cpu_index(void)
+{
+	int i;
+
+	for (i = 0; i < CONFIG_MAX_CPUS; i++) {
+		if (mp_get_apic_id(i) == lapicid()) {
+			return i;
+		}
+	}
+	return -1;
+}
+
 void cpu_initialize(unsigned int index)
 {
 	/* Because we busy wait at the printk spinlock.
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index 5d44aae..db12fa4 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -212,12 +212,8 @@
 	return ci;
 }
 
-static inline unsigned long cpu_index(void)
-{
-	struct cpu_info *ci;
-	ci = cpu_info();
-	return ci->index;
-}
+int cpu_index(void);
+
 #endif
 
 #ifndef __ROMCC__ // romcc is segfaulting in some cases
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index ef576ec..900019d 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -659,7 +659,7 @@
 }
 
 /* Returns APIC id for coreboot CPU number or < 0 on failure. */
-static int mp_get_apic_id(int cpu_slot)
+int mp_get_apic_id(int cpu_slot)
 {
 	if (cpu_slot >= CONFIG_MAX_CPUS || cpu_slot < 0)
 		return -1;
diff --git a/src/include/cpu/x86/mp.h b/src/include/cpu/x86/mp.h
index fba3e75..989a195 100644
--- a/src/include/cpu/x86/mp.h
+++ b/src/include/cpu/x86/mp.h
@@ -145,5 +145,7 @@
 void smm_initiate_relocation_parallel(void);
 /* Send SMI to self with single execution. */
 void smm_initiate_relocation(void);
+/* Get CPU Index based on apic id */
+int mp_get_apic_id(int cpu_slot);
 
 #endif /* _X86_MP_H_ */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I52c2cc17d825a5dd53759df516c5b74d88fa0580
Gerrit-Change-Number: 26327
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
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