[coreboot-gerrit] Change in coreboot[master]: commonlib: CBFS based option table implementation
Lev (Code Review)
gerrit at coreboot.org
Tue May 15 18:46:43 CEST 2018
Lev has uploaded this change for review. ( https://review.coreboot.org/26300
Change subject: commonlib: CBFS based option table implementation
......................................................................
commonlib: CBFS based option table implementation
Change-Id: Ia2b962bad8d3eea3cf7b9a9d79a46b0c5add93cc
Signed-off-by: Bartek Pastudzki <Bartek.Pastudzki at 3mdeb.com>
---
M src/Kconfig
M src/commonlib/Makefile.inc
A src/commonlib/option.c
M src/drivers/pc80/rtc/mc146818rtc.c
M src/drivers/pc80/rtc/mc146818rtc_boot.c
M src/include/option.h
M src/include/pc80/mc146818rtc.h
7 files changed, 125 insertions(+), 35 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/26300/1
diff --git a/src/Kconfig b/src/Kconfig
index 99a704d..000b801 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -113,15 +113,28 @@
Otherwise, say N to use the provided pregenerated scanner/parser.
config USE_OPTION_TABLE
- bool "Use CMOS for configuration values"
+ bool "Use option table for configuration values"
depends on HAVE_OPTION_TABLE
help
Enable this option if coreboot shall read options from the "CMOS"
NVRAM instead of using hard-coded values.
+choice
+ prompt "Option table backend"
+ default OPTION_TABLE_CMOS
+ depends on USE_OPTION_TABLE
+
+config OPTION_TABLE_CMOS
+ bool "CMOS"
+
+config OPTION_TABLE_CBFS
+ bool "CBFS"
+
+endchoice
+
config STATIC_OPTION_TABLE
bool "Load default configuration values into CMOS on each boot"
- depends on USE_OPTION_TABLE
+ depends on OPTION_TABLE_CMOS
help
Enable this option to reset "CMOS" NVRAM values to default on
every boot. Use this if you want the NVRAM configuration to
diff --git a/src/commonlib/Makefile.inc b/src/commonlib/Makefile.inc
index edd17c3..ef2dc99 100644
--- a/src/commonlib/Makefile.inc
+++ b/src/commonlib/Makefile.inc
@@ -35,3 +35,6 @@
romstage-y += lz4_wrapper.c
ramstage-y += lz4_wrapper.c
postcar-y += lz4_wrapper.c
+
+romstage-$(CONFIG_OPTION_TABLE_CBFS) += option.c
+ramstage-$(CONFIG_OPTION_TABLE_CBFS) += option.c
diff --git a/src/commonlib/option.c b/src/commonlib/option.c
new file mode 100644
index 0000000..08de19e
--- /dev/null
+++ b/src/commonlib/option.c
@@ -0,0 +1,68 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 3mdeb
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <option.h>
+
+#include <cbfs.h>
+#include <string.h>
+#include <types.h>
+
+#include <commonlib/cbfs.h>
+#include <commonlib/region.h>
+#include <commonlib/cbfs_serialized.h>
+#include <console/console.h>
+
+#define CONFIG_FILE "option_table"
+
+static char *after_str(const char *s, const char *pattern)
+{
+ size_t pattern_l = strlen(pattern);
+ while ((s = strchr(s, pattern[0])) != NULL) {
+ if (strncmp(s, pattern, pattern_l) == 0)
+ return (char *)s+pattern_l;
+ s++;
+ }
+
+ return NULL;
+}
+
+#define map_cbfs_file(...) cbfs_boot_map_with_leak(__VA_ARGS__)
+
+enum cb_err get_option(void *dest, const char *name)
+{
+ const char *boot_file = NULL;
+ size_t boot_file_len = 0;
+ char *token = NULL;
+
+ boot_file = map_cbfs_file(
+ CONFIG_FILE, CBFS_TYPE_RAW, &boot_file_len
+ );
+
+ if (boot_file == NULL) {
+ printk(BIOS_ALERT,
+ "file [%s] not found in CBFS\n", CONFIG_FILE
+ );
+ return CB_CMOS_OPTION_NOT_FOUND;
+ }
+
+ token = after_str(boot_file, name);
+ if (token != NULL) {
+ *((u8 *)dest) = *token - '0';
+ return CB_SUCCESS;
+ }
+
+ return CB_CMOS_OPTION_NOT_FOUND;
+}
+
diff --git a/src/drivers/pc80/rtc/mc146818rtc.c b/src/drivers/pc80/rtc/mc146818rtc.c
index 928b403..e87a4da 100644
--- a/src/drivers/pc80/rtc/mc146818rtc.c
+++ b/src/drivers/pc80/rtc/mc146818rtc.c
@@ -30,7 +30,7 @@
#include <security/vboot/vbnv_layout.h>
/* There's no way around this include guard. option_table.h is autogenerated */
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if IS_ENABLED(CONFIG_OPTION_TABLE_CMOS)
#include "option_table.h"
#else
#define LB_CKS_RANGE_START 0
@@ -65,6 +65,7 @@
rtc_set(&time);
}
+#if IS_ENABLED(CONFIG_OPTION_TABLE_CMOS)
static int cmos_checksum_valid(int range_start, int range_end, int cks_loc)
{
int i;
@@ -92,6 +93,7 @@
cmos_write(((sum >> 8) & 0x0ff), cks_loc);
cmos_write(((sum >> 0) & 0x0ff), cks_loc + 1);
}
+#endif /* CONFIG_OPTION_TABLE_CMOS */
#define RTC_CONTROL_DEFAULT (RTC_24H)
#define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)
@@ -122,15 +124,15 @@
x = cmos_read(RTC_VALID);
cmos_invalid = !(x & RTC_VRT);
- if (IS_ENABLED(CONFIG_USE_OPTION_TABLE)) {
+ #if IS_ENABLED(CONFIG_OPTION_TABLE_CMOS)
/* See if there is a CMOS checksum error */
checksum_invalid = !cmos_checksum_valid(PC_CKS_RANGE_START,
PC_CKS_RANGE_END, PC_CKS_LOC);
clear_cmos = false;
- } else {
+ #else
clear_cmos = true;
- }
+ #endif /* CONFIG_OPTION_TABLE_CMOS */
if (cmos_invalid || invalid)
cmos_write(cmos_read(RTC_CONTROL) | RTC_SET, RTC_CONTROL);
@@ -162,7 +164,7 @@
/* Ensure all reserved bits are 0 in register D */
cmos_write(RTC_VRT, RTC_VALID);
- if (IS_ENABLED(CONFIG_USE_OPTION_TABLE)) {
+ #if IS_ENABLED(CONFIG_OPTION_TABLE_CMOS)
/* See if there is a LB CMOS checksum error */
checksum_invalid = !cmos_checksum_valid(LB_CKS_RANGE_START,
LB_CKS_RANGE_END, LB_CKS_LOC);
@@ -171,7 +173,7 @@
/* Make certain we have a valid checksum */
cmos_set_checksum(PC_CKS_RANGE_START, PC_CKS_RANGE_END, PC_CKS_LOC);
- }
+ #endif
/* Clear any pending interrupts */
cmos_read(RTC_INTR_FLAGS);
@@ -204,6 +206,8 @@
#endif /* __SMM__ */
+#if IS_ENABLED(CONFIG_OPTION_TABLE_CMOS)
+
/*
* This routine returns the value of the requested bits.
* input bit = bit count from the beginning of the cmos image
@@ -247,9 +251,6 @@
size_t namelen;
int found = 0;
- if (!IS_ENABLED(CONFIG_USE_OPTION_TABLE))
- return CB_CMOS_OTABLE_DISABLED;
-
LOCK_NVRAM_CBFS_SPINLOCK();
/* Figure out how long name is */
@@ -337,11 +338,8 @@
{
printk(BIOS_NOTICE, "NOTICE: read_option() used to access CMOS "
"from non-ROMCC code, please use get_option() instead.\n");
- if (IS_ENABLED(CONFIG_USE_OPTION_TABLE)) {
- const unsigned char byte = cmos_read(start / 8);
- return (byte >> (start & 7U)) & ((1U << size) - 1U);
- }
- return def;
+ const unsigned char byte = cmos_read(start / 8);
+ return (byte >> (start & 7U)) & ((1U << size) - 1U);
}
enum cb_err set_option(const char *name, void *value)
@@ -352,9 +350,6 @@
size_t namelen;
int found = 0;
- if (!IS_ENABLED(CONFIG_USE_OPTION_TABLE))
- return CB_CMOS_OTABLE_DISABLED;
-
/* Figure out how long name is */
namelen = strnlen(name, CMOS_MAX_NAME_LENGTH);
@@ -394,9 +389,11 @@
return CB_SUCCESS;
}
+#endif /* CONFIG_OPTION_TABLE_CMOS */
+
/*
* If the CMOS is cleared, the rtc_reg has the invalid date. That
- * hurts some OSes. Even if we don't set USE_OPTION_TABLE, we need
+ * hurts some OSes. Even if we don't set OPTION_TABLE_CMOS, we need
* to make sure the date is valid.
*/
void cmos_check_update_date(void)
diff --git a/src/drivers/pc80/rtc/mc146818rtc_boot.c b/src/drivers/pc80/rtc/mc146818rtc_boot.c
index c5cd86c..7b2bc88 100644
--- a/src/drivers/pc80/rtc/mc146818rtc_boot.c
+++ b/src/drivers/pc80/rtc/mc146818rtc_boot.c
@@ -34,7 +34,7 @@
int cmos_chksum_valid(void);
int cmos_chksum_valid(void)
{
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if IS_ENABLED(CONFIG_OPTION_TABLE_CMOS)
unsigned char addr;
u16 sum, old_sum;
@@ -53,7 +53,7 @@
#endif
}
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if IS_ENABLED(CONFIG_OPTION_TABLE_CMOS)
void sanitize_cmos(void)
{
if (cmos_error() || !cmos_chksum_valid() ||
diff --git a/src/include/option.h b/src/include/option.h
index f6ede96..686e961 100644
--- a/src/include/option.h
+++ b/src/include/option.h
@@ -1,19 +1,24 @@
#ifndef _OPTION_H_
#define _OPTION_H_
-/*
- * FIXME: get_option() needs to be abstracted better so that other non-volatile
- * storage can be used. This will benefit machines without CMOS as well as those
- * without a battery-backed CMOS (e.g. some laptops).
- */
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
-#include <pc80/mc146818rtc.h>
-#else
#include <types.h>
-static inline enum cb_err get_option(void *dest, const char *name)
+
+enum cb_err set_option(const char *name, void *val);
+enum cb_err get_option(void *dest, const char *name);
+
+
+#if !IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+
+inline enum cb_err set_option(const char *name, void *val)
{
return CB_CMOS_OTABLE_DISABLED;
}
+
+inline enum cb_err get_option(void *dest, const char *name)
+{
+ return CB_CMOS_OTABLE_DISABLED;
+}
+
#endif
#endif /* _OPTION_H_ */
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h
index 5d7497d..f1212ce 100644
--- a/src/include/pc80/mc146818rtc.h
+++ b/src/include/pc80/mc146818rtc.h
@@ -182,11 +182,15 @@
void cmos_init(bool invalid);
void cmos_check_update_date(void);
-enum cb_err set_option(const char *name, void *val);
-enum cb_err get_option(void *dest, const char *name);
+#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+
+#include <option.h>
unsigned int read_option_lowlevel(unsigned int start, unsigned int size,
unsigned int def);
+
+#endif /* CONFIG_OPTION_TABLE_CMOS */
+
#else /* defined(__ROMCC__) */
#include <drivers/pc80/rtc/mc146818rtc_romcc.c>
#endif /* !defined(__ROMCC__) */
@@ -254,11 +258,11 @@
static inline void cmos_post_init(void) {}
#endif /* CONFIG_CMOS_POST */
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if IS_ENABLED(CONFIG_OPTION_TABLE_CMOS)
void sanitize_cmos(void);
#else
static inline void sanitize_cmos(void) {}
-#endif /* CONFIG_USE_OPTION_TABLE */
+#endif /* CONFIG_OPTION_TABLE_CMOS */
#else /* !CONFIG_ARCH_X86 */
static inline void cmos_post_init(void) {}
--
To view, visit https://review.coreboot.org/26300
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ia2b962bad8d3eea3cf7b9a9d79a46b0c5add93cc
Gerrit-Change-Number: 26300
Gerrit-PatchSet: 1
Gerrit-Owner: Lev
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180515/f41a5bc6/attachment-0001.html>
More information about the coreboot-gerrit
mailing list