[coreboot-gerrit] Change in coreboot[master]: atlas ish: ish configuration
Li1 Feng (Code Review)
gerrit at coreboot.org
Tue May 15 03:07:33 CEST 2018
Hello Kyoung Il Kim, build bot (Jenkins), Hannah Williams,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/26277
to look at the new patch set (#2).
Change subject: atlas ish: ish configuration
......................................................................
atlas ish: ish configuration
ISH is set as PCI device 0x13. ISH Uart0, I2c0, GPIO Gp1
and Gp2 are configured.
Previous flag "IshEnable" is removed.
Flag "SOC_ISH_ENABLE" is used to enable ISH in coreboot.
In file src/mainboard/google/poppy/Kconfig.name,
find section "config BOARD_GOOGLE_ATLAS", and add "select
SOC_ISH_ENABLE"
BUG=b:79244403
BRANCH=none
TEST=Verified on Atlas board with ISH rework. Console output of ISH
showed on serial port.
Change-Id: I606705bed4030469b71ef630cfdd974601a4f899
Signed-off-by: li feng <li1.feng at intel.com>
---
M src/mainboard/google/poppy/variants/atlas/devicetree.cb
M src/mainboard/google/poppy/variants/atlas/gpio.c
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/chip.c
M src/soc/intel/skylake/chip.h
M src/soc/intel/skylake/chip_fsp20.c
6 files changed, 20 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/26277/2
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I606705bed4030469b71ef630cfdd974601a4f899
Gerrit-Change-Number: 26277
Gerrit-PatchSet: 2
Gerrit-Owner: Li1 Feng <li1.feng at intel.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Kyoung Il Kim <kyoung.il.kim at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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