[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Support PCH UART 0 and 1 for console

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26140 )

Change subject: soc/intel/skylake: Support PCH UART 0 and 1 for console
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Patch Set 1: Verified+1

Build Successful 

https://qa.coreboot.org/job/coreboot-gerrit/71665/ : SUCCESS

https://qa.coreboot.org/job/coreboot-checkpatch/25820/ : SUCCESS


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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I91323ed3298f9b2558764aa4b54173833c021a7b
Gerrit-Change-Number: 26140
Gerrit-PatchSet: 1
Gerrit-Owner: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Mon, 07 May 2018 19:13:47 +0000
Gerrit-HasComments: No
Gerrit-HasLabels: Yes
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