[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Include stage cache support for CNL
Subrata Banik (Code Review)
gerrit at coreboot.org
Fri May 4 10:15:47 CEST 2018
Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/26052
Change subject: soc/intel/cannonlake: Include stage cache support for CNL
......................................................................
soc/intel/cannonlake: Include stage cache support for CNL
TEST=Build and boot cannonlake rvp. cpu_index() has return
correct cpu index based on caller.
Change-Id: I23f80ef455d075a14121577f401cfc7c44ba0cfa
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
M src/soc/intel/cannonlake/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/26052/1
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 898b444..ea399b8 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -17,6 +17,7 @@
select BOOT_DEVICE_SUPPORTS_WRITES
select C_ENVIRONMENT_BOOTBLOCK
select CACHE_MRC_SETTINGS
+ select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE
select COMMON_FADT
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select GENERIC_GPIO_LIB
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I23f80ef455d075a14121577f401cfc7c44ba0cfa
Gerrit-Change-Number: 26052
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
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