[coreboot-gerrit] Change in coreboot[master]: nb/intel/i945: Put stage cache in TSEG

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25603 )

Change subject: nb/intel/i945: Put stage cache in TSEG
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Patch Set 6:

Build Successful 

https://qa.coreboot.org/job/coreboot-gerrit/71287/ : SUCCESS

https://qa.coreboot.org/job/coreboot-checkpatch/25457/ : SUCCESS


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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I447815bb0acf5f8e53834b74785d496f9d4df1da
Gerrit-Change-Number: 25603
Gerrit-PatchSet: 6
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Thu, 03 May 2018 08:24:17 +0000
Gerrit-HasComments: No
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