[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Remove USB30PortInit setting

[Martin Roth (Code Review)]

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/26015


Change subject: soc/amd/stoneyridge: Remove USB30PortInit setting
......................................................................

soc/amd/stoneyridge: Remove USB30PortInit setting

This bitmask sets the USB PORTSC.DR bit for each XHCI port.
This is mainboard specific, and only for non-removable
devices attached to the XHCI port.

BUG=b:72859972
TEST=Boot grunt

Change-Id: I0488b80da1fe4e57b06d3bc7a93ad9ebbfc97749
Signed-off-by: Martin Roth <martinroth at chromium.org>
---
M src/soc/amd/stoneyridge/BiosCallOuts.c
1 file changed, 0 insertions(+), 3 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/26015/1

diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c
index c6eef1a..d2f7a32 100644
--- a/src/soc/amd/stoneyridge/BiosCallOuts.c
+++ b/src/soc/amd/stoneyridge/BiosCallOuts.c
@@ -68,9 +68,6 @@
 			FchParams_env->Usb.Xhci0Enable = FALSE;
 		FchParams_env->Usb.Xhci1Enable = FALSE;
 
-		/* 8: If USB3 port is unremoveable. */
-		FchParams_env->Usb.USB30PortInit = 8;
-
 		/* SATA configuration */
 		FchParams_env->Sata.SataClass = CONFIG_STONEYRIDGE_SATA_MODE;
 		switch ((SATA_CLASS)CONFIG_STONEYRIDGE_SATA_MODE) {

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I0488b80da1fe4e57b06d3bc7a93ad9ebbfc97749
Gerrit-Change-Number: 26015
Gerrit-PatchSet: 1
Gerrit-Owner: Martin Roth <martinroth at google.com>
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