[coreboot-gerrit] Change in coreboot[master]: drivers/generic/bayhub: Add driver for BayHub BH720
Simon Glass (Code Review)
gerrit at coreboot.org
Tue May 1 20:00:27 CEST 2018
Simon Glass has uploaded this change for review. ( https://review.coreboot.org/25966
Change subject: drivers/generic/bayhub: Add driver for BayHub BH720
......................................................................
drivers/generic/bayhub: Add driver for BayHub BH720
Add a driver which puts the device into power-saving mode.
BUG=b:73726008
BRANCH=none
TEST=boot and see this message:
BayHub BH720: Power-saving enabled 110103
From linux:
$ iotools pci_read32 2 0 0 0x90
0x00110103
Change-Id: Idbfb114f3782c9386ce9b487c3abdb0afbc4a0d9
Signed-off-by: Simon Glass <sjg at chromium.org>
---
A src/drivers/generic/bayhub/Kconfig
A src/drivers/generic/bayhub/Makefile.inc
A src/drivers/generic/bayhub/bh720.c
A src/drivers/generic/bayhub/chip.h
M src/include/device/pci_ids.h
5 files changed, 107 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/25966/1
diff --git a/src/drivers/generic/bayhub/Kconfig b/src/drivers/generic/bayhub/Kconfig
new file mode 100644
index 0000000..882e8f9
--- /dev/null
+++ b/src/drivers/generic/bayhub/Kconfig
@@ -0,0 +1,2 @@
+config DRIVERS_GENERIC_BH720
+ bool
diff --git a/src/drivers/generic/bayhub/Makefile.inc b/src/drivers/generic/bayhub/Makefile.inc
new file mode 100644
index 0000000..3458815
--- /dev/null
+++ b/src/drivers/generic/bayhub/Makefile.inc
@@ -0,0 +1 @@
+ramstage-$(CONFIG_DRIVERS_GENERIC_BH720) += bh720.c
diff --git a/src/drivers/generic/bayhub/bh720.c b/src/drivers/generic/bayhub/bh720.c
new file mode 100644
index 0000000..cd9dd25
--- /dev/null
+++ b/src/drivers/generic/bayhub/bh720.c
@@ -0,0 +1,94 @@
+/*
+ * Driver for BayHub Technology BH720 PCI to eMMC 5.0 HS200 bridge
+ *
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/path.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include "chip.h"
+
+enum {
+ BH720_PROTECT = 0xd0,
+ BH720_PROTECT_OFF = 0,
+ BH720_PROTECT_ON = 1,
+
+ BH720_RTD3_L1 = 0x3e0,
+ BH720_RTD3_L1_DISABLE_L1 = BIT(28),
+
+ BH720_LINK_CTRL = 0x90,
+ BH720_LINK_CTRL_L0_ENABLE = BIT(0),
+ BH720_LINK_CTRL_L1_ENABLE = BIT(1),
+ BH720_LINK_CTRL_CLKREQ = BIT(8),
+};
+
+static void bh720_init(struct device *dev)
+{
+ struct drivers_generic_bayhub_config *config = dev->chip_info;
+
+ pci_dev_init(dev);
+
+ if (config && config->power_saving) {
+ /*
+ * This procedure for enabling power-saving mode is from the
+ * BayHub BIOS Implementation Guideline document.
+ */
+ pci_write_config32(dev, BH720_PROTECT, BH720_PROTECT_OFF);
+ pci_or_config32(dev, BH720_RTD3_L1, BH720_RTD3_L1_DISABLE_L1);
+ pci_or_config32(dev, BH720_LINK_CTRL,
+ BH720_LINK_CTRL_L0_ENABLE |
+ BH720_LINK_CTRL_L1_ENABLE);
+ pci_or_config32(dev, BH720_LINK_CTRL, BH720_LINK_CTRL_CLKREQ);
+ pci_write_config32(dev, BH720_PROTECT, BH720_PROTECT_ON);
+ printk(BIOS_INFO, "BayHub BH720: Power-saving enabled (link_ctrl=%#x)\n",
+ pci_read_config32(dev, BH720_LINK_CTRL));
+ }
+}
+
+static struct pci_operations pci_ops = {
+ .set_subsystem = pci_dev_set_subsystem,
+};
+
+static struct device_operations bh720_ops = {
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .ops_pci = &pci_ops,
+ .init = bh720_init,
+};
+
+static const unsigned short pci_device_ids[] = {
+ PCI_DEVICE_ID_O2_BH720,
+ 0
+};
+
+static const struct pci_driver bayhub_bh720 __pci_driver = {
+ .ops = &bh720_ops,
+ .vendor = PCI_VENDOR_ID_O2,
+ .devices = pci_device_ids,
+};
+
+static void bh720_enable(struct device *dev)
+{
+ dev->ops = &bh720_ops;
+}
+
+struct chip_operations bayhub_bh720_ops = {
+ CHIP_NAME("BayHub Technology BH720 PCI to eMMC 5.0 HS200 bridge")
+ .enable_dev = bh720_enable,
+};
diff --git a/src/drivers/generic/bayhub/chip.h b/src/drivers/generic/bayhub/chip.h
new file mode 100644
index 0000000..a9254b8
--- /dev/null
+++ b/src/drivers/generic/bayhub/chip.h
@@ -0,0 +1,9 @@
+#include <arch/acpi_device.h>
+
+/*
+ * Bayhub BG720 PCI to eMMC bridge
+ */
+struct drivers_generic_bayhub_config {
+ /* 1 to enable power-saving mode, 0 to disable */
+ int power_saving;
+};
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 7dc3e00..a0fcdda 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -1688,6 +1688,7 @@
#define PCI_DEVICE_ID_O2_6730 0x673a
#define PCI_DEVICE_ID_O2_6832 0x6832
#define PCI_DEVICE_ID_O2_6836 0x6836
+#define PCI_DEVICE_ID_O2_BH720 0x8620
#define PCI_VENDOR_ID_3DFX 0x121a
#define PCI_DEVICE_ID_3DFX_VOODOO 0x0001
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Idbfb114f3782c9386ce9b487c3abdb0afbc4a0d9
Gerrit-Change-Number: 25966
Gerrit-PatchSet: 1
Gerrit-Owner: Simon Glass <sjg at chromium.org>
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