[coreboot-gerrit] Change in coreboot[master]: soc/cavium: Apply additional devicetree fixups

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/25382


Change subject: soc/cavium: Apply additional devicetree fixups
......................................................................

soc/cavium: Apply additional devicetree fixups

Depends on Change-Id: I0f27b92a5e074966f893399eb401eb97d784850d

Apply additional devicetree fixes:
* Update SCLK from boot fuses
* Updated REFCLKUAA from UART ref clock divider settings

Fixes Linux console wrong baud rate once the PL011 driver is started.
Tested on Cavium SoC.

Change-Id: I7e8eefd913915a879dad28dfb7801a2018ed2985
Signed-off-by: Patrick Rudolph <patrick.rudolph at 9elements.com>
---
M src/soc/cavium/cn81xx/soc.c
1 file changed, 31 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/25382/1

diff --git a/src/soc/cavium/cn81xx/soc.c b/src/soc/cavium/cn81xx/soc.c
index 83ee118..2e331f70 100644
--- a/src/soc/cavium/cn81xx/soc.c
+++ b/src/soc/cavium/cn81xx/soc.c
@@ -27,9 +27,40 @@
 #include <stdlib.h>
 #include <string.h>
 #include <symbols.h>
+#include <console/uart.h>
+#include <fit.h>
+
 /* FIXME(dhendrix): Need TZRAM_* definitions from ATF for Cavium */
 //#include <arm-trusted-firmware/plat/rockchip/ck3399/include/shared/bl31_param.h>
 
+/* Do additional devicetree modifications. */
+void fit_platform_fixup(struct DeviceTree *tree)
+{
+	DeviceTreeNode *dt_node;
+
+	/* Set the sclk clock rate. */
+	dt_node = dt_find_node_by_path(tree->root, "soc at 0/sclk", NULL, NULL, 0);
+	if (dt_node) {
+		const u32 freq = thunderx_get_io_clock();
+		printk(BIOS_INFO, "%s: Set SCLK to %u Hz\n", __func__, freq);
+		dt_add_u32_prop(dt_node, "clock-frequency", freq);
+	} else
+		printk(BIOS_ERR, "%s: Node not found. OS might miss-behave !\n",
+		       __func__);
+
+	/* Set refclkuaa clock rate. */
+	dt_node = dt_find_node_by_path(tree->root, "soc at 0/refclkuaa", NULL,
+				       NULL, 0);
+	if (dt_node) {
+		const u32 freq = uart_platform_refclk();
+		printk(BIOS_INFO, "%s: Set REFCLKUAA to %u Hz\n", __func__,
+		       freq);
+		dt_add_u32_prop(dt_node, "clock-frequency", freq);
+	} else
+		printk(BIOS_ERR, "%s: Node not found. OS might miss-behave !\n",
+		       __func__);
+}
+
 static void soc_read_resources(device_t dev)
 {
 	ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size_mb() * KiB);

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I7e8eefd913915a879dad28dfb7801a2018ed2985
Gerrit-Change-Number: 25382
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <patrick.rudolph at 9elements.com>
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