[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Call sb_spibase() early

[Garrett Kirkendall (Code Review)]

Garrett Kirkendall has uploaded this change for review. ( https://review.coreboot.org/25246


Change subject: soc/amd/stoneyridge: Call sb_spibase() early
......................................................................

soc/amd/stoneyridge: Call sb_spibase() early

Call sb_spibase() early so that it will set up the SPI base address.
This is another step to moving AGESA calls out of the bootblock.

BUG=b:74427893
BRANCH=master
TEST=Build and boot Grunt.

Change-Id: I665d32f3acb0046eb6abbd363735561f0372f2a0
Signed-off-by: Garrett Kirkendall <garrett.kirkendall at amd.corp-partner.google.com>
---
M src/soc/amd/stoneyridge/southbridge.c
1 file changed, 1 insertion(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/25246/1

diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index b4dcd8f..cf059a4 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -559,6 +559,7 @@
 	sb_enable_rom();
 	sb_lpc_port80();
 	sb_lpc_decode();
+	sb_spibase();
 	sb_acpi_mmio_decode();
 	enable_aoac_devices();
 }

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I665d32f3acb0046eb6abbd363735561f0372f2a0
Gerrit-Change-Number: 25246
Gerrit-PatchSet: 1
Gerrit-Owner: Garrett Kirkendall <garrett.kirkendall at amd.corp-partner.google.com>
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