[coreboot-gerrit] Change in coreboot[master]: mainboard/intel/coffeelake_rvp: Ensure MP Initialization

[Kin Wai Ng (Code Review)]

Hello Naresh Solanki, Subrata Banik, Balaji Manigandan, Aamir Bohra, Maulik V Vaghela, Rizwan Qureshi,

I'd like you to do a code review. Please visit

    https://review.coreboot.org/25228

to review the following change.


Change subject: mainboard/intel/coffeelake_rvp: Ensure MP Initialization
......................................................................

mainboard/intel/coffeelake_rvp: Ensure MP Initialization

Do not skip MP Initialization (including BSP).

Change-Id: If9c66045957ee9f973c7ce430efa4f5d3d5eed84
Signed-off-by: Ng Kin Wai <kin.wai.ng at intel.com>
---
M src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/25228/1

diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
old mode 100644
new mode 100755
index 1ea7940..3867ff9
--- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
+++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb
@@ -6,7 +6,7 @@
 
 	# FSP configuration
 	register "SaGv" = "3"
-	register "FspSkipMpInit" = "1"
+	register "FspSkipMpInit" = "0"
 	register "SmbusEnable" = "1"
 	register "ScsEmmcEnabled" = "1"
 	register "ScsEmmcHs400Enabled" = "1"

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: If9c66045957ee9f973c7ce430efa4f5d3d5eed84
Gerrit-Change-Number: 25228
Gerrit-PatchSet: 1
Gerrit-Owner: Kin Wai Ng <kin.wai.ng at intel.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela at intel.com>
Gerrit-Reviewer: Naresh Solanki <naresh.solanki at intel.com>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
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