[coreboot-gerrit] Change in coreboot[master]: src/soc/amd/stoneyridge: cleanup southbridge.c

[Garrett Kirkendall (Code Review)]

Hello build bot (Jenkins), 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/24998

to look at the new patch set (#2).

Change subject: src/soc/amd/stoneyridge: cleanup southbridge.c
......................................................................

src/soc/amd/stoneyridge: cleanup southbridge.c

Limit dependency on vendorcode header files and add appropriate
definitions to southbridge.h.  Add code to enable decode of FCH ACPI
MMIO regions. Factor out to functions, device power-on
code for AMBA and UART.  Add FCH I2C device power-on code.  Add code for
FCH to decode TPM memory and IO regions.

BUG=b:69220826 b:65442212
BRANCH=master
TEST=Build and boot

Change-Id: I45c1d1d7edc864000282c7ca4e2b8f2a14ea9eac
Signed-off-by: Garrett Kirkendall <garrett.kirkendall at amd.corp-partner.google.com>
---
M src/soc/amd/stoneyridge/include/soc/southbridge.h
M src/soc/amd/stoneyridge/southbridge.c
2 files changed, 182 insertions(+), 29 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/24998/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I45c1d1d7edc864000282c7ca4e2b8f2a14ea9eac
Gerrit-Change-Number: 24998
Gerrit-PatchSet: 2
Gerrit-Owner: Garrett Kirkendall <garrett.kirkendall at amd.corp-partner.google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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