[coreboot-gerrit] Change in coreboot[master]: soc/intel/denverton_ns: Update UART legacy mode to keep FSP traces

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23623 )

Change subject: soc/intel/denverton_ns: Update UART legacy mode to keep FSP traces
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Patch Set 7: Verified+1

Build Successful 

https://qa.coreboot.org/job/coreboot-checkpatch/22679/ : SUCCESS

https://qa.coreboot.org/job/coreboot-gerrit/68235/ : SUCCESS


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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: Id8801e178ffd8eeee78ece07da7bd6b8dbd88538
Gerrit-Change-Number: 23623
Gerrit-PatchSet: 7
Gerrit-Owner: Julien Viard de Galbert <jviarddegalbert at online.net>
Gerrit-Reviewer: FEI WANG <wangfei.jimei at gmail.com>
Gerrit-Reviewer: Julien Viard de Galbert <jviarddegalbert at online.net>
Gerrit-Reviewer: Nico Huber <nico.h at gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Shine Liu <shine.liu at intel.com>
Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-CC: Patrick Rudolph <patrick.rudolph at 9elements.com>
Gerrit-Comment-Date: Mon, 05 Mar 2018 10:14:26 +0000
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