[coreboot-gerrit] Change in coreboot[master]: sb/intel/common: Add functions to manipulate PMBASE
Patrick Rudolph (Code Review)
gerrit at coreboot.org
Fri Jun 29 10:46:28 CEST 2018
Hello Patrick Rudolph,
I'd like you to do a code review. Please visit
https://review.coreboot.org/27278
to review the following change.
Change subject: sb/intel/common: Add functions to manipulate PMBASE
......................................................................
sb/intel/common: Add functions to manipulate PMBASE
Get rid of duplicated get_pmbase and use the new common function.
TODO: Use the new functions to manipulate register in PMBASE.
Change-Id: I3b454434ade560fb056b1fc0afe9541df93e14dd
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/southbridge/intel/common/Makefile.inc
A src/southbridge/intel/common/pmbase.c
A src/southbridge/intel/common/pmbase.h
M src/southbridge/intel/common/pmutil.c
M src/southbridge/intel/common/pmutil.h
M src/southbridge/intel/common/smi.c
M src/southbridge/intel/common/smihandler.c
M src/southbridge/intel/lynxpoint/pch.c
M src/southbridge/intel/lynxpoint/pch.h
M src/southbridge/intel/lynxpoint/pmutil.c
10 files changed, 112 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/27278/1
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc
index bf3a86e..961b71b 100644
--- a/src/southbridge/intel/common/Makefile.inc
+++ b/src/southbridge/intel/common/Makefile.inc
@@ -18,6 +18,11 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON),y)
+romstage-y += pmbase.c
+ramstage-y += pmbase.c
+postcar-y += pmbase.c
+smm-y += pmbase.c
+
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usb_debug.c
ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
diff --git a/src/southbridge/intel/common/pmbase.c b/src/southbridge/intel/common/pmbase.c
new file mode 100644
index 0000000..ecdd1c5
--- /dev/null
+++ b/src/southbridge/intel/common/pmbase.c
@@ -0,0 +1,79 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 Patrick Rudolph <siro at das-labor.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <arch/early_variables.h>
+
+#include "pmbase.h"
+
+/* LPC PM Base Address Register */
+#define PMBASE 0x40
+
+/* PCI Configuration Space (D31:F0): LPC */
+#if defined(__SIMPLE_DEVICE__)
+#define PCH_LPC_DEV PCI_DEV(0, 0x1f, 0)
+#else
+#define PCH_LPC_DEV dev_find_slot(0, PCI_DEVFN(0x1f, 0))
+#endif
+
+u16 get_pmbase(void)
+{
+#if defined(__SMM__)
+ /* Don't assume PMBASE is still the same */
+ return pci_read_config16(PCH_LPC_DEV, PMBASE) & 0xfffc;
+#else
+ static u16 pmbase CAR_GLOBAL;
+
+ if (pmbase)
+ return pmbase;
+
+ pmbase = pci_read_config16(PCH_LPC_DEV, PMBASE) & 0xfffc;
+
+ return pmbase;
+#endif
+}
+
+void write_pmbase32(const u16 addr, const u32 val)
+{
+ outl(val, get_pmbase() | addr);
+}
+
+void write_pmbase16(const u16 addr, const u16 val)
+{
+ outw(val, get_pmbase() | addr);
+}
+
+void write_pmbase8(const u16 addr, const u8 val)
+{
+ outb(val, get_pmbase() | addr);
+}
+
+u32 read_pmbase32(const u16 addr)
+{
+ return inl(get_pmbase() | addr);
+}
+
+u16 read_pmbase16(const u16 addr)
+{
+ return inw(get_pmbase() | addr);
+}
+
+u8 read_pmbase8(const u16 addr)
+{
+ return inb(get_pmbase() | addr);
+}
diff --git a/src/southbridge/intel/common/pmbase.h b/src/southbridge/intel/common/pmbase.h
new file mode 100644
index 0000000..27ad68a
--- /dev/null
+++ b/src/southbridge/intel/common/pmbase.h
@@ -0,0 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 Patrick Rudolph <siro at das-labor.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+u16 get_pmbase(void);
+
+void write_pmbase32(const u16 addr, const u32 val);
+void write_pmbase16(const u16 addr, const u16 val);
+void write_pmbase8(const u16 addr, const u8 val);
+
+u32 read_pmbase32(const u16 addr);
+u16 read_pmbase16(const u16 addr);
+u8 read_pmbase8(const u16 addr);
diff --git a/src/southbridge/intel/common/pmutil.c b/src/southbridge/intel/common/pmutil.c
index 97df201..03ae473 100644
--- a/src/southbridge/intel/common/pmutil.c
+++ b/src/southbridge/intel/common/pmutil.c
@@ -22,7 +22,7 @@
#include <cpu/x86/smm.h>
#include <elog.h>
#include <pc80/mc146818rtc.h>
-
+#include <southbridge/intel/common/pmbase.h>
#include <southbridge/intel/common/gpio.h>
#include "pmutil.h"
diff --git a/src/southbridge/intel/common/pmutil.h b/src/southbridge/intel/common/pmutil.h
index e2b6e58..9393ef4 100644
--- a/src/southbridge/intel/common/pmutil.h
+++ b/src/southbridge/intel/common/pmutil.h
@@ -101,8 +101,6 @@
#define TCO_LOCK (1 << 12)
#define TCO2_CNT 0x6a
-u16 get_pmbase(void);
-
u16 reset_pm1_status(void);
void dump_pm1_status(u16 pm1_sts);
void dump_tco_status(u32 tco_sts);
diff --git a/src/southbridge/intel/common/smi.c b/src/southbridge/intel/common/smi.c
index deaecb2..eaae8f2 100644
--- a/src/southbridge/intel/common/smi.c
+++ b/src/southbridge/intel/common/smi.c
@@ -23,18 +23,13 @@
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <cpu/intel/smm/gen1/smi.h>
-
+#include "pmbase.h"
#include "pmutil.h"
#define DEBUG_PERIODIC_SMIS 0
static u16 pmbase;
-u16 get_pmbase(void)
-{
- return pmbase;
-}
-
void southbridge_smm_init(void)
{
u32 smi_en;
diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c
index 65a1b96..234a1c5 100644
--- a/src/southbridge/intel/common/smihandler.c
+++ b/src/southbridge/intel/common/smihandler.c
@@ -26,16 +26,12 @@
#include <halt.h>
#include <pc80/mc146818rtc.h>
#include "pmutil.h"
+#include "pmbase.h"
static int smm_initialized = 0;
static u16 pmbase;
-u16 get_pmbase(void)
-{
- return pmbase;
-}
-
/* Defined in <cpu/x86/smm.h> which is used outside of common code*/
u16 smm_get_pmbase(void)
{
diff --git a/src/southbridge/intel/lynxpoint/pch.c b/src/southbridge/intel/lynxpoint/pch.c
index 1a390cc..762347e 100644
--- a/src/southbridge/intel/lynxpoint/pch.c
+++ b/src/southbridge/intel/lynxpoint/pch.c
@@ -57,16 +57,6 @@
return pch_silicon_type() == PCH_TYPE_LPT_LP;
}
-u16 get_pmbase(void)
-{
- static u16 pmbase;
-
- if (!pmbase)
- pmbase = pci_read_config16(pch_get_lpc_device(),
- PMBASE) & 0xfffc;
- return pmbase;
-}
-
u16 get_gpiobase(void)
{
static u16 gpiobase;
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index ae996e8..f38c1dc 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -144,7 +144,6 @@
int pch_silicon_revision(void);
int pch_silicon_type(void);
int pch_is_lp(void);
-u16 get_pmbase(void);
u16 get_gpiobase(void);
/* Power Management register handling in pmutil.c */
diff --git a/src/southbridge/intel/lynxpoint/pmutil.c b/src/southbridge/intel/lynxpoint/pmutil.c
index e96d683..30ef9aa 100644
--- a/src/southbridge/intel/lynxpoint/pmutil.c
+++ b/src/southbridge/intel/lynxpoint/pmutil.c
@@ -25,6 +25,7 @@
#include <device/pci_def.h>
#include <console/console.h>
#include <security/vboot/vbnv.h>
+#include <common/pmbase.h>
#include "pch.h"
#if IS_ENABLED(CONFIG_INTEL_LYNXPOINT_LP)
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I3b454434ade560fb056b1fc0afe9541df93e14dd
Gerrit-Change-Number: 27278
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <patrick.rudolph at 9elements.com>
Gerrit-Reviewer: Patrick Rudolph <siro at das-labor.org>
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