[coreboot-gerrit] Change in libgfxinit[master]: gma config: Tag constants depending on generation or CPU
Nico Huber (Code Review)
gerrit at coreboot.org
Wed Jun 13 01:27:44 CEST 2018
Nico Huber has uploaded this change for review. ( https://review.coreboot.org/27067
Change subject: gma config: Tag constants depending on generation or CPU
......................................................................
gma config: Tag constants depending on generation or CPU
Tag all derived config values that depend on the generation <genconst>
and those that depend on the CPU <cpuconst>. <genbool> and <cpubool>
are shortcuts for `<genconst> Boolean` and `<cpuconst> Boolean`,
respectively.
To ease later parsing, also move all multiline expressions after a
line break.
Change-Id: Iaa50987c51dc62ab2eb8b31e8f223b8a94e8ac12
Signed-off-by: Nico Huber <nico.h at gmx.de>
---
M common/Makefile.inc
M common/hw-gfx-gma-config.ads.template
2 files changed, 101 insertions(+), 95 deletions(-)
git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/67/27067/1
diff --git a/common/Makefile.inc b/common/Makefile.inc
index 965d6ba..5eeba41 100644
--- a/common/Makefile.inc
+++ b/common/Makefile.inc
@@ -60,6 +60,8 @@
-e's/<<INTERNAL_PORT>>/$(CONFIG_GFX_GMA_INTERNAL_PORT)/' \
-e's/<<ANALOG_I2C_PORT>>/$(CONFIG_GFX_GMA_ANALOG_I2C_PORT)/' \
-e's/<<DEFAULT_MMIO_BASE>>/$(CONFIG_GFX_GMA_DEFAULT_MMIO)/' \
+ -e's/<\(gen\|\(ilk\|hsw\|skl\)\(...\)\?\)const>/constant/' \
+ -e's/<\(gen\|\(ilk\|hsw\|skl\)\(...\)\?\)bool>/constant Boolean/' \
$< >$@
gfxinit-gen-y += $(hw-gfx-gma-config-ads)
diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template
index 50e7e7c..03f343b 100644
--- a/common/hw-gfx-gma-config.ads.template
+++ b/common/hw-gfx-gma-config.ads.template
@@ -81,150 +81,153 @@
Haswell_Plus : constant Boolean := Gen >= Haswell;
Broxton_Plus : constant Boolean := Gen >= Broxton;
- CPU_Ironlake : constant Boolean := Gen_Ironlake and then CPU = Ironlake;
- CPU_Sandybridge : constant Boolean := Gen_Ironlake and then CPU = Sandybridge;
- CPU_Ivybridge : constant Boolean := Gen_Ironlake and then CPU = Ivybridge;
- CPU_Haswell : constant Boolean := Gen_Haswell and then CPU = Haswell;
- CPU_Broadwell : constant Boolean := Gen_Haswell and then CPU = Broadwell;
+ CPU_Ironlake : <ilkbool> := Gen_Ironlake and then CPU = Ironlake;
+ CPU_Sandybridge : <ilkbool> := Gen_Ironlake and then CPU = Sandybridge;
+ CPU_Ivybridge : <ilkbool> := Gen_Ironlake and then CPU = Ivybridge;
+ CPU_Haswell : <hswbool> := Gen_Haswell and then CPU = Haswell;
+ CPU_Broadwell : <hswbool> := Gen_Haswell and then CPU = Broadwell;
- Sandybridge_Plus : constant Boolean :=
+ Sandybridge_Plus : <ilkbool> :=
((Gen_Ironlake and then CPU >= Sandybridge) or Haswell_Plus);
- Ivybridge_Plus : constant Boolean :=
+ Ivybridge_Plus : <ilkbool> :=
((Gen_Ironlake and then CPU >= Ivybridge) or Haswell_Plus);
- Broadwell_Plus : constant Boolean :=
+ Broadwell_Plus : <hswbool> :=
((Gen_Haswell and then CPU >= Broadwell) or Broxton_Plus);
----------------------------------------------------------------------------
- Have_HDMI_Buf_Override : constant Boolean :=
- DDI_HDMI_Buffer_Translation /= -1;
+ Have_HDMI_Buf_Override : constant Boolean := DDI_HDMI_Buffer_Translation /= -1;
Default_MMIO_Base_Set : constant Boolean := Default_MMIO_Base /= 0;
Has_Internal_Display : constant Boolean := Internal_Display /= None;
Internal_Is_LVDS : constant Boolean := Internal_Display = LVDS;
Internal_Is_EDP : constant Boolean := Internal_Display = DP;
Have_DVI_I : constant Boolean := Analog_I2C_Port /= PCH_DAC;
- Has_Presence_Straps : constant Boolean := not Gen_Broxton;
- Is_ULT : constant Boolean :=
+
+ Has_Presence_Straps : <genbool> := Gen /= Broxton;
+ Is_ULT : <hswsklbool> :=
((Gen_Haswell or Gen_Skylake) and then CPU_Var = ULT);
- ----- CPU pipe: --------
- Has_Tertiary_Pipe : constant Boolean := Ivybridge_Plus;
- Disable_Trickle_Feed : constant Boolean := Gen /= Haswell;
- Pipe_Enabled_Workaround : constant Boolean := CPU_Broadwell;
- Has_EDP_Transcoder : constant Boolean := Gen >= Haswell;
- Use_PDW_For_EDP_Scaling : constant Boolean := CPU_Haswell;
- Has_Pipe_DDI_Func : constant Boolean := Gen >= Haswell;
- Has_Trans_Clk_Sel : constant Boolean := Gen >= Haswell;
- Has_Pipe_MSA_Misc : constant Boolean := Gen >= Haswell;
- Has_Pipeconf_Misc : constant Boolean := Broadwell_Plus;
- Has_Pipeconf_BPC : constant Boolean := not CPU_Haswell;
- Has_Plane_Control : constant Boolean := Gen >= Broxton;
- Has_DSP_Linoff : constant Boolean := Gen <= Ironlake;
- Has_PF_Pipe_Select : constant Boolean := CPU_Ivybridge or CPU_Haswell;
- Has_Cursor_FBC_Control : constant Boolean := Ivybridge_Plus;
- VGA_Plane_Workaround : constant Boolean := CPU_Ivybridge;
- Has_GMCH_DP_Transcoder : constant Boolean := Gen = G45;
- Has_GMCH_VGACNTRL : constant Boolean := Gen = G45;
- Has_GMCH_PFIT_CONTROL : constant Boolean := Gen = G45;
+ ---------- CPU pipe: ---------
+ Has_Tertiary_Pipe : <ilkbool> := Ivybridge_Plus;
+ Disable_Trickle_Feed : <genbool> := Gen /= Haswell;
+ Pipe_Enabled_Workaround : <hswbool> := CPU_Broadwell;
+ Has_EDP_Transcoder : <genbool> := Gen >= Haswell;
+ Use_PDW_For_EDP_Scaling : <hswbool> := CPU_Haswell;
+ Has_Pipe_DDI_Func : <genbool> := Gen >= Haswell;
+ Has_Trans_Clk_Sel : <genbool> := Gen >= Haswell;
+ Has_Pipe_MSA_Misc : <genbool> := Gen >= Haswell;
+ Has_Pipeconf_Misc : <hswbool> := Broadwell_Plus;
+ Has_Pipeconf_BPC : <hswbool> := not CPU_Haswell;
+ Has_Plane_Control : <genbool> := Gen >= Broxton;
+ Has_DSP_Linoff : <genbool> := Gen <= Ironlake;
+ Has_PF_Pipe_Select : <ilkhswbool> := CPU_Ivybridge or CPU_Haswell;
+ Has_Cursor_FBC_Control : <ilkbool> := Ivybridge_Plus;
+ VGA_Plane_Workaround : <ilkbool> := CPU_Ivybridge;
+ Has_GMCH_DP_Transcoder : <genbool> := Gen = G45;
+ Has_GMCH_VGACNTRL : <genbool> := Gen = G45;
+ Has_GMCH_PFIT_CONTROL : <genbool> := Gen = G45;
- ----- Panel power: -----
- Has_PP_Write_Protection : constant Boolean := Gen <= Ironlake;
- Has_PP_Port_Select : constant Boolean := Gen <= Ironlake;
- Use_PP_VDD_Override : constant Boolean := Gen <= Ironlake;
- Has_PCH_Panel_Power : constant Boolean := Gen >= Ironlake;
+ --------- Panel power: -------
+ Has_PP_Write_Protection : <genbool> := Gen <= Ironlake;
+ Has_PP_Port_Select : <genbool> := Gen <= Ironlake;
+ Use_PP_VDD_Override : <genbool> := Gen <= Ironlake;
+ Has_PCH_Panel_Power : <genbool> := Gen >= Ironlake;
- ----- PCH/FDI: ---------
- Has_PCH : constant Boolean := Gen /= Broxton and Gen /= G45;
- Has_PCH_DAC : constant Boolean :=
- (Gen_Ironlake or (Gen_Haswell and then not Is_ULT));
+ ----------- PCH/FDI: ---------
+ Has_PCH : <genbool> := Gen /= Broxton and Gen /= G45;
+ Has_PCH_DAC : <hswbool> :=
+ (Gen_Ironlake or else (Gen_Haswell and then not Is_ULT));
- Has_PCH_Aux_Channels : constant Boolean := Gen in Ironlake .. Haswell;
+ Has_PCH_Aux_Channels : <genbool> := Gen in Ironlake .. Haswell;
- VGA_Has_Sync_Disable : constant Boolean := Gen <= Ironlake;
+ VGA_Has_Sync_Disable : <genbool> := Gen <= Ironlake;
- Has_Trans_Timing_Ovrrde : constant Boolean := Sandybridge_Plus;
+ Has_Trans_Timing_Ovrrde : <ilkbool> := Sandybridge_Plus;
- Has_DPLL_SEL : constant Boolean := Gen = Ironlake;
- Has_FDI_BPC : constant Boolean := Gen = Ironlake;
- Has_FDI_Composite_Sel : constant Boolean := CPU_Ivybridge;
- Has_Original_ILK_Trans : constant Boolean := CPU_Ironlake;
- Has_Trans_DP_Ctl : constant Boolean := CPU_Sandybridge or CPU_Ivybridge;
- Has_Ivy_Bridge_FDI : constant Boolean := CPU_Ivybridge;
- Has_FDI_C : constant Boolean := CPU_Ivybridge;
+ Has_DPLL_SEL : <genbool> := Gen = Ironlake;
+ Has_FDI_BPC : <genbool> := Gen = Ironlake;
+ Has_FDI_Composite_Sel : <ilkbool> := CPU_Ivybridge;
+ Has_Original_ILK_Trans : <ilkbool> := CPU_Ironlake;
+ Has_Trans_DP_Ctl : <ilkbool> := CPU_Sandybridge or CPU_Ivybridge;
+ Has_Ivy_Bridge_FDI : <ilkbool> := CPU_Ivybridge;
+ Has_FDI_C : <ilkbool> := CPU_Ivybridge;
- Has_FDI_RX_Power_Down : constant Boolean := Gen = Haswell;
+ Has_FDI_RX_Power_Down : <genbool> := Gen = Haswell;
- Has_GMCH_RawClk : constant Boolean := Gen = G45;
+ Has_GMCH_RawClk : <genbool> := Gen = G45;
- ----- DDI: -------------
- End_EDP_Training_Late : constant Boolean := Gen = Haswell;
- Has_Per_DDI_Clock_Sel : constant Boolean := Gen = Haswell;
- Has_HOTPLUG_CTL : constant Boolean := Gen = Haswell;
- Has_SHOTPLUG_CTL_A : constant Boolean :=
+ ----------- DDI: -------------
+ End_EDP_Training_Late : <genbool> := Gen = Haswell;
+ Has_Per_DDI_Clock_Sel : <genbool> := Gen = Haswell;
+ Has_HOTPLUG_CTL : <genbool> := Gen = Haswell;
+ Has_SHOTPLUG_CTL_A : <hswbool> :=
((Gen_Haswell and then Is_ULT) or Gen_Skylake);
- Has_DDI_PHYs : constant Boolean := Gen = Broxton;
+ Has_DDI_PHYs : <genbool> := Gen = Broxton;
- Has_DDI_D : constant Boolean :=
+ Has_DDI_D : <hswsklbool> :=
((Gen_Haswell or Gen_Skylake) and then not Is_ULT);
- Has_DDI_E : constant Boolean := -- might be disabled by x4 eDP
- Has_DDI_D;
+ -- might be disabled by x4 eDP:
+ Has_DDI_E : <hswsklbool> := Has_DDI_D;
- Has_DDI_Buffer_Trans : constant Boolean := Gen >= Haswell and
- Gen /= Broxton;
- Has_Broadwell_DDI_Bufs : constant Boolean := CPU_Broadwell;
- Has_Low_Voltage_Swing : constant Boolean := Gen >= Broxton;
- Has_Iboost_Config : constant Boolean := Gen >= Skylake;
+ Has_DDI_Buffer_Trans : <genbool> := Gen >= Haswell and
+ not Has_DDI_PHYs;
+ Has_DDI_HDMI_Buffer_Override : <genbool> :=
+ (DDI_HDMI_Buffer_Translation /= -1);
- Need_DP_Aux_Mutex : constant Boolean := False; -- Skylake & (PSR | GTC)
+ Has_Broadwell_DDI_Bufs : <hswbool> := CPU_Broadwell;
+ Has_Low_Voltage_Swing : <genbool> := Gen >= Broxton;
+ Has_Iboost_Config : <genbool> := Gen >= Skylake;
- ----- GMBUS: -----------
- Ungate_GMBUS_Unit_Level : constant Boolean := Gen >= Skylake;
- GMBUS_Alternative_Pins : constant Boolean := Gen = Broxton;
- Has_PCH_GMBUS : constant Boolean := Gen >= Ironlake;
+ Need_DP_Aux_Mutex : <genbool> := False; -- Skylake & (PSR | GTC)
- ----- Power: -----------
- Has_IPS : constant Boolean :=
+ ----------- GMBUS: -----------
+ Ungate_GMBUS_Unit_Level : <genbool> := Gen >= Skylake;
+ GMBUS_Alternative_Pins : <genbool> := Gen = Broxton;
+ Has_PCH_GMBUS : <genbool> := Gen >= Ironlake;
+
+ ----------- Power: -----------
+ Has_IPS : <hswbool> :=
(Gen_Haswell and then
- ((CPU_Haswell and Is_ULT) or CPU_Broadwell));
- Has_IPS_CTL_Mailbox : constant Boolean := CPU_Broadwell;
+ ((CPU = Haswell and Is_ULT) or CPU = Broadwell));
+ Has_IPS_CTL_Mailbox : <hswbool> := CPU_Broadwell;
- Has_Per_Pipe_SRD : constant Boolean := Broadwell_Plus;
+ Has_Per_Pipe_SRD : <hswbool> := Broadwell_Plus;
- ----- GTT: -------------
- Has_64bit_GTT : constant Boolean := Broadwell_Plus;
+ ----------- GTT: -------------
+ Has_64bit_GTT : <hswbool> := Broadwell_Plus;
----------------------------------------------------------------------------
- Max_Pipe : constant Pipe_Index :=
+ Max_Pipe : <ilkconst> Pipe_Index :=
(if Has_Tertiary_Pipe then Tertiary else Secondary);
- Last_Digital_Port : constant Digital_Port :=
+ Last_Digital_Port : <hswsklconst> Digital_Port :=
(if Has_DDI_E then DIGI_E else DIGI_C);
----------------------------------------------------------------------------
type FDI_Per_Port is array (Port_Type) of Boolean;
- Is_FDI_Port : constant FDI_Per_Port :=
+ Is_FDI_Port : <hswconst> FDI_Per_Port :=
(Disabled => False,
Internal => Gen_Ironlake and Internal_Is_LVDS,
DP1 .. HDMI3 => Gen_Ironlake,
Analog => Has_PCH_DAC);
type FDI_Lanes_Per_Port is array (GPU_Port) of DP_Lane_Count;
- FDI_Lane_Count : constant FDI_Lanes_Per_Port :=
+ FDI_Lane_Count : <genconst> FDI_Lanes_Per_Port :=
(DIGI_D => DP_Lane_Count_2,
others => (if Gen_Ironlake then DP_Lane_Count_4 else DP_Lane_Count_2));
- FDI_Training : constant FDI_Training_Type :=
+ FDI_Training : <ilkconst> FDI_Training_Type :=
(if CPU_Ironlake then Simple_Training
elsif CPU_Sandybridge then Full_Training
else Auto_Training);
----------------------------------------------------------------------------
- Default_DDI_HDMI_Buffer_Translation : constant DDI_HDMI_Buf_Trans_Range :=
+ Default_DDI_HDMI_Buffer_Translation : <hswconst> DDI_HDMI_Buf_Trans_Range :=
(if CPU_Haswell then 6
elsif CPU_Broadwell then 7
elsif Broxton_Plus then 8
@@ -232,7 +235,7 @@
----------------------------------------------------------------------------
- Default_CDClk_Freq : constant Frequency_Type :=
+ Default_CDClk_Freq : <ilkconst> Frequency_Type :=
(if Gen_G45 then 320_000_000 -- unused
elsif CPU_Ironlake or Gen_Haswell then 450_000_000
elsif CPU_Sandybridge or CPU_Ivybridge then 400_000_000
@@ -240,7 +243,7 @@
elsif Gen_Skylake then 337_500_000
else Frequency_Type'First);
- Default_RawClk_Freq : constant Frequency_Type :=
+ Default_RawClk_Freq : <hswconst> Frequency_Type :=
(if Gen_G45 then 100_000_000 -- unused, depends on FSB
elsif Gen_Ironlake then 125_000_000
elsif Gen_Haswell then (if Is_ULT then 24_000_000 else 125_000_000)
@@ -255,7 +258,7 @@
type Width_Per_Pipe is array (Pipe_Index) of Width_Type;
- Maximum_Scalable_Width : constant Width_Per_Pipe :=
+ Maximum_Scalable_Width : <hswconst> Width_Per_Pipe :=
(if Gen_G45 then -- TODO: Is this true?
(Primary => 4096,
Secondary => 2048,
@@ -270,26 +273,27 @@
Tertiary => 4096));
-- Maximum X position of hardware cursors
- Maximum_Cursor_X : constant := (case Gen is
- when G45 .. Ironlake => 4095,
- when Haswell .. Skylake => 8191);
+ Maximum_Cursor_X : <genconst> :=
+ (case Gen is
+ when G45 .. Ironlake => 4095,
+ when Haswell .. Skylake => 8191);
- Maximum_Cursor_Y : constant := 4095;
+ Maximum_Cursor_Y : <genconst> := 4095;
----------------------------------------------------------------------------
-- FIXME: Unknown for Broxton, Linux' i915 contains a fixme too :-D
- HDMI_Max_Clock_24bpp : constant Frequency_Type :=
+ HDMI_Max_Clock_24bpp : <genconst> Frequency_Type :=
(if Haswell_Plus then 300_000_000 else 225_000_000);
----------------------------------------------------------------------------
- GTT_PTE_Size : constant := (if Has_64bit_GTT then 8 else 4);
+ GTT_PTE_Size : <hswconst> := (if Has_64bit_GTT then 8 else 4);
- Fence_Base : constant :=
+ Fence_Base : <ilkconst> :=
(if not Sandybridge_Plus then 16#0000_3000# else 16#0010_0000#);
- Fence_Count : constant :=
+ Fence_Count : <ilkconst> :=
(if not Ivybridge_Plus then 16 else 32);
----------------------------------------------------------------------------
--
To view, visit https://review.coreboot.org/27067
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: libgfxinit
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iaa50987c51dc62ab2eb8b31e8f223b8a94e8ac12
Gerrit-Change-Number: 27067
Gerrit-PatchSet: 1
Gerrit-Owner: Nico Huber <nico.h at gmx.de>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180612/ffedf51d/attachment-0001.html>
More information about the coreboot-gerrit
mailing list