[coreboot-gerrit] Change in coreboot[master]: mb/google/octopus/variants/baseboard: Update DPTF parameters

[Sumeet R Pawnikar (Code Review)]

Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/27027


Change subject: mb/google/octopus/variants/baseboard: Update DPTF parameters
......................................................................

mb/google/octopus/variants/baseboard: Update DPTF parameters

This patch updates DPTF parameters for Octopus baseboard.

BUG=b:79779737
BRANCH=None
TEST=Build coreboot for Octopus board.

Change-Id: I1456b7b9ee9e02491c66b0709c710e1a7ec08cc5
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar at intel.com>
---
M src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl
1 file changed, 7 insertions(+), 7 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/27027/1

diff --git a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl
index 140eb4b..2fafa52 100644
--- a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl
+++ b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl
@@ -14,8 +14,8 @@
  */
 
 /* Below values might change after Thermal Tuning. */
-#define DPTF_CPU_PASSIVE	95
-#define DPTF_CPU_CRITICAL	105
+#define DPTF_CPU_PASSIVE	90
+#define DPTF_CPU_CRITICAL	99
 
 #define DPTF_TSR0_SENSOR_ID	0
 #define DPTF_TSR0_SENSOR_NAME	"Battery"
@@ -24,12 +24,12 @@
 
 #define DPTF_TSR1_SENSOR_ID	1
 #define DPTF_TSR1_SENSOR_NAME	"Ambient"
-#define DPTF_TSR1_PASSIVE	46
-#define DPTF_TSR1_CRITICAL	75
+#define DPTF_TSR1_PASSIVE	48
+#define DPTF_TSR1_CRITICAL	90
 
 #define DPTF_TSR2_SENSOR_ID	2
 #define DPTF_TSR2_SENSOR_NAME	"Charger"
-#define DPTF_TSR2_PASSIVE	58
+#define DPTF_TSR2_PASSIVE	62
 #define DPTF_TSR2_CRITICAL	90
 
 #define DPTF_ENABLE_CHARGER
@@ -48,7 +48,7 @@
 	Package () { \_SB.PCI0.TCPU, \_SB.PCI0.TCPU, 100, 100, 0, 0, 0, 0 },
 
 	/* CPU Effect on Temp Sensor 0 */
-	Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 100, 1200, 0, 0, 0, 0 },
+	Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 },
 
 #ifdef DPTF_ENABLE_CHARGER
 	/* Charger Effect on Temp Sensor 2 */
@@ -65,7 +65,7 @@
 	Package () {	/* Power Limit 1 */
 		0,	/* PowerLimitIndex, 0 for Power Limit 1 */
 		3000,	/* PowerLimitMinimum */
-		8000,	/* PowerLimitMaximum */
+		12000,	/* PowerLimitMaximum */
 		1000,	/* TimeWindowMinimum */
 		1000,	/* TimeWindowMaximum */
 		200	/* StepSize */

-- 
To view, visit https://review.coreboot.org/27027
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I1456b7b9ee9e02491c66b0709c710e1a7ec08cc5
Gerrit-Change-Number: 27027
Gerrit-PatchSet: 1
Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar at intel.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180612/9f765a58/attachment.html>