[coreboot-gerrit] Change in coreboot[master]: device/pci_early.c: Get rid of device_t

[Elyes HAOUAS (Code Review)]

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/26998


Change subject: device/pci_early.c: Get rid of device_t
......................................................................

device/pci_early.c: Get rid of device_t

Change-Id: I6f8cf4c3e34b47cd4dde08ad8e998978e59df280
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/device/pci_early.c
1 file changed, 3 insertions(+), 3 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/26998/1

diff --git a/src/device/pci_early.c b/src/device/pci_early.c
index 6baebe0..f595cf5 100644
--- a/src/device/pci_early.c
+++ b/src/device/pci_early.c
@@ -73,7 +73,7 @@
 
 #if IS_ENABLED(CONFIG_EARLY_PCI_BRIDGE)
 
-static void pci_bridge_reset_secondary(device_t p2p_bridge)
+static void pci_bridge_reset_secondary(struct device *p2p_bridge)
 {
 	u16 reg16;
 
@@ -90,7 +90,7 @@
 	pci_write_config16(p2p_bridge, PCI_BRIDGE_CONTROL, reg16);
 }
 
-static void pci_bridge_set_secondary(device_t p2p_bridge, u8 secondary)
+static void pci_bridge_set_secondary(struct device *p2p_bridge, u8 secondary)
 {
 	/* Disable config transaction forwarding. */
 	pci_write_config8(p2p_bridge, PCI_SECONDARY_BUS, 0x00);
@@ -100,7 +100,7 @@
 	pci_write_config8(p2p_bridge, PCI_SUBORDINATE_BUS, secondary);
 }
 
-static void pci_bridge_set_mmio(device_t p2p_bridge, u32 base, u32 size)
+static void pci_bridge_set_mmio(struct device *p2p_bridge, u32 base, u32 size)
 {
 	u16 reg16;
 

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6f8cf4c3e34b47cd4dde08ad8e998978e59df280
Gerrit-Change-Number: 26998
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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