[coreboot-gerrit] Change in coreboot[master]: nb/amd/amdfam10: Get rid of device_t

Elyes HAOUAS (Code Review) gerrit at coreboot.org
Sun Jun 10 10:28:27 CEST 2018


Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/26996


Change subject: nb/amd/amdfam10: Get rid of device_t
......................................................................

nb/amd/amdfam10: Get rid of device_t

Use of device_t has been abandoned in ramstage.

Change-Id: Ie9d59f5f23982ebf2750fbacb577cdf11875fba7
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/northbridge/amd/amdfam10/acpi.c
M src/northbridge/amd/amdfam10/amdfam10.h
M src/northbridge/amd/amdfam10/ht_config.c
M src/northbridge/amd/amdfam10/ht_config.h
M src/northbridge/amd/amdfam10/misc_control.c
M src/northbridge/amd/amdfam10/northbridge.h
M src/northbridge/amd/amdfam10/util.c
7 files changed, 28 insertions(+), 28 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/26996/1

diff --git a/src/northbridge/amd/amdfam10/acpi.c b/src/northbridge/amd/amdfam10/acpi.c
index e67a127..eaea725 100644
--- a/src/northbridge/amd/amdfam10/acpi.c
+++ b/src/northbridge/amd/amdfam10/acpi.c
@@ -28,7 +28,7 @@
 
 unsigned long acpi_create_madt_lapic_nmis(unsigned long current, u16 flags, u8 lint)
 {
-	device_t cpu;
+	struct device *cpu;
 	int cpu_index = 0;
 
 	for (cpu = all_devices; cpu; cpu = cpu->next) {
@@ -47,7 +47,7 @@
 
 unsigned long acpi_create_srat_lapics(unsigned long current)
 {
-	device_t cpu;
+	struct device *cpu;
 	int cpu_index = 0;
 
 	for (cpu = all_devices; cpu; cpu = cpu->next) {
@@ -193,7 +193,7 @@
 
 }
 
-void northbridge_acpi_write_vars(device_t device)
+void northbridge_acpi_write_vars(struct device *device)
 {
 	/*
 	 * If more than one physical CPU is installed, northbridge_acpi_write_vars()
@@ -326,7 +326,7 @@
 	acpigen_pop_len();
 }
 
-unsigned long northbridge_write_acpi_tables(device_t device,
+unsigned long northbridge_write_acpi_tables(struct device *device,
 					    unsigned long current,
 					    struct acpi_rsdp *rsdp)
 {
diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h
index 3e34a25..b744e96 100644
--- a/src/northbridge/amd/amdfam10/amdfam10.h
+++ b/src/northbridge/amd/amdfam10/amdfam10.h
@@ -987,7 +987,7 @@
 #endif
 */
 #ifndef __PRE_RAM__
-device_t get_node_pci(u32 nodeid, u32 fn);
+struct device *get_node_pci(u32 nodeid, u32 fn);
 #endif
 
 #ifdef __PRE_RAM__
@@ -1021,10 +1021,10 @@
 struct acpi_rsdp;
 
 #ifndef __SIMPLE_DEVICE__
-unsigned long northbridge_write_acpi_tables(device_t device,
+unsigned long northbridge_write_acpi_tables(struct device *device,
 					    unsigned long start,
 					    struct acpi_rsdp *rsdp);
-void northbridge_acpi_write_vars(device_t device);
+void northbridge_acpi_write_vars(struct device *device);
 #endif
 
 #endif /* AMDFAM10_H */
diff --git a/src/northbridge/amd/amdfam10/ht_config.c b/src/northbridge/amd/amdfam10/ht_config.c
index 916111c..37b1492 100644
--- a/src/northbridge/amd/amdfam10/ht_config.c
+++ b/src/northbridge/amd/amdfam10/ht_config.c
@@ -26,7 +26,7 @@
 struct dram_base_mask_t get_dram_base_mask(u32 nodeid)
 {
 	struct dram_base_mask_t d;
-	device_t dev = __f1_dev[0];
+	struct device *dev = __f1_dev[0];
 
 	u32 temp;
 	temp = pci_read_config32(dev, 0x44 + (nodeid << 3)); //[39:24] at [31:16]
@@ -57,7 +57,7 @@
 	tempreg |= (busn_max << 24)|(busn_min << 16)|(linkn << 8);
 
 	for (i = 0; i < sysconf.nodes; i++) {
-		device_t dev = __f1_dev[i];
+		struct device *dev = __f1_dev[i];
 		pci_write_config32(dev, 0xe0 + ht_c_index * 4, tempreg);
 	}
 }
@@ -68,7 +68,7 @@
 	u32 ht_c_index = get_ht_c_index(link);
 
 	for (i = 0; i < sysconf.nodes; i++) {
-		device_t dev = __f1_dev[i];
+		struct device *dev = __f1_dev[i];
 		pci_write_config32(dev, 0xe0 + ht_c_index * 4, 0);
 	}
 }
@@ -190,8 +190,8 @@
 }
 
 
-void set_io_addr_reg(device_t dev, u32 nodeid, u32 linkn, u32 reg,
-				u32 io_min, u32 io_max)
+void set_io_addr_reg(struct device *dev, u32 nodeid, u32 linkn, u32 reg,
+		     u32 io_min, u32 io_max)
 {
 	u32 i;
 	u32 tempreg;
diff --git a/src/northbridge/amd/amdfam10/ht_config.h b/src/northbridge/amd/amdfam10/ht_config.h
index 75626fa..748a981 100644
--- a/src/northbridge/amd/amdfam10/ht_config.h
+++ b/src/northbridge/amd/amdfam10/ht_config.h
@@ -19,8 +19,8 @@
 typedef struct amdfam10_sysconf_t sys_info_conf_t;
 
 /* FIXME */
-u32 amdfam10_nodeid(device_t dev);
-extern device_t __f1_dev[];
+u32 amdfam10_nodeid(struct device *dev);
+extern struct device *__f1_dev[];
 
 struct dram_base_mask_t {
 	u32 base; //[47:27] at [28:8]
@@ -46,8 +46,8 @@
 u32 get_io_addr_index(u32 nodeid, u32 linkn);
 u32 get_mmio_addr_index(u32 nodeid, u32 linkn);
 
-void set_io_addr_reg(device_t dev, u32 nodeid, u32 linkn, u32 reg,
-				u32 io_min, u32 io_max);
+void set_io_addr_reg(struct device *dev, u32 nodeid, u32 linkn, u32 reg,
+		     u32 io_min, u32 io_max);
 
 void set_mmio_addr_reg(u32 nodeid, u32 linkn, u32 reg, u32 index, u32 mmio_min, u32 mmio_max, u32 nodes);
 
diff --git a/src/northbridge/amd/amdfam10/misc_control.c b/src/northbridge/amd/amdfam10/misc_control.c
index 7cd9bff..028f6af 100644
--- a/src/northbridge/amd/amdfam10/misc_control.c
+++ b/src/northbridge/amd/amdfam10/misc_control.c
@@ -49,7 +49,7 @@
  * implemented in a way to NOT DOING legacy VGA resource allocation on
  * purpose :-(.
  */
-static void mcf3_read_resources(device_t dev)
+static void mcf3_read_resources(struct device *dev)
 {
 	struct resource *resource;
 	unsigned char gart;
@@ -75,14 +75,14 @@
 	}
 }
 
-static void set_agp_aperture(device_t dev, uint32_t pci_id)
+static void set_agp_aperture(struct device *dev, uint32_t pci_id)
 {
 	uint32_t dword;
 	struct resource *resource;
 
 	resource = probe_resource(dev, 0x94);
 	if (resource) {
-		device_t pdev;
+		struct device *pdev;
 		u32 gart_base, gart_acr;
 
 		/* Remember this resource has been stored */
@@ -117,7 +117,7 @@
 	}
 }
 
-static void mcf3_set_resources_fam10h(device_t dev)
+static void mcf3_set_resources_fam10h(struct device *dev)
 {
 	/* Set the gart aperture */
 	set_agp_aperture(dev, 0x1203);
@@ -126,7 +126,7 @@
 	pci_dev_set_resources(dev);
 }
 
-static void mcf3_set_resources_fam15h_model10(device_t dev)
+static void mcf3_set_resources_fam15h_model10(struct device *dev)
 {
 	/* Set the gart aperture */
 	set_agp_aperture(dev, 0x1403);
@@ -135,7 +135,7 @@
 	pci_dev_set_resources(dev);
 }
 
-static void mcf3_set_resources_fam15h(device_t dev)
+static void mcf3_set_resources_fam15h(struct device *dev)
 {
 	/* Set the gart aperture */
 	set_agp_aperture(dev, 0x1603);
diff --git a/src/northbridge/amd/amdfam10/northbridge.h b/src/northbridge/amd/amdfam10/northbridge.h
index 68b3f1d..69d7415 100644
--- a/src/northbridge/amd/amdfam10/northbridge.h
+++ b/src/northbridge/amd/amdfam10/northbridge.h
@@ -16,7 +16,7 @@
 #ifndef NORTHBRIDGE_AMD_AMDFAM10_H
 #define NORTHBRIDGE_AMD_AMDFAM10_H
 
-u32 amdfam10_scan_root_bus(device_t root, u32 max);
+u32 amdfam10_scan_root_bus(struct device *root, u32 max);
 void get_pci1234(void);
 
 #endif /* NORTHBRIDGE_AMD_AMDFAM10_H */
diff --git a/src/northbridge/amd/amdfam10/util.c b/src/northbridge/amd/amdfam10/util.c
index 4cce7f8..4bcb11d 100644
--- a/src/northbridge/amd/amdfam10/util.c
+++ b/src/northbridge/amd/amdfam10/util.c
@@ -189,7 +189,7 @@
  * @param dev A 32-bit number in the standard bus/dev/fn format which is used
  *            raw config space.
  */
-static void showalldram(int level, device_t dev)
+static void showalldram(int level, struct device *dev)
 {
 	u8 reg;
 	for (reg = DRAM_ROUTE_START; reg <= DRAM_ROUTE_END; reg += 8) {
@@ -207,7 +207,7 @@
  * @param dev A 32-bit number in the standard bus/dev/fn format which is used
  *            raw config space.
  */
-static void showallmmio(int level, device_t dev)
+static void showallmmio(int level, struct device *dev)
 {
 	u8 reg;
 	for (reg = MMIO_ROUTE_START; reg <= MMIO_ROUTE_END; reg += 8) {
@@ -225,7 +225,7 @@
  * @param dev A 32-bit number in the standard bus/dev/fn format which is used
  *            raw config space.
  */
-static void showallpciio(int level, device_t dev)
+static void showallpciio(int level, struct device *dev)
 {
 	u8 reg;
 	for (reg = PCIIO_ROUTE_START; reg <= PCIIO_ROUTE_END; reg += 8) {
@@ -243,7 +243,7 @@
  * @param dev A 32-bit number in the standard bus/dev/fn format which is used
  *            raw config space.
  */
-static void showallconfig(int level, device_t dev)
+static void showallconfig(int level, struct device *dev)
 {
 	u8 reg;
 	for (reg = CONFIG_ROUTE_START; reg <= CONFIG_ROUTE_END; reg += 4) {
@@ -260,7 +260,7 @@
  * @param dev A 32-bit number in the standard bus/dev/fn format which is used
  *            raw config space.
  */
-void showallroutes(int level, device_t dev)
+void showallroutes(int level, struct device *dev)
 {
 	showalldram(level, dev);
 	showallmmio(level, dev);

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ie9d59f5f23982ebf2750fbacb577cdf11875fba7
Gerrit-Change-Number: 26996
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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