[coreboot-gerrit] Change in coreboot[master]: [WIP]soc/intel/common: Add bootblock common stage file

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18457 )

Change subject: [WIP]soc/intel/common: Add bootblock common stage file
......................................................................


Patch Set 15:

(10 comments)

https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/bootblock/bootblock.c
File src/soc/intel/common/basecode/bootblock/bootblock.c:

https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/bootblock/bootblock.c@59
PS15, Line 59:          * Enabling PWRM Base for accessing
code indent should use tabs where possible


https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/bootblock/bootblock.c@60
PS15, Line 60:          * Global Reset Cause Register.
code indent should use tabs where possible


https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/bootblock/bootblock.c@61
PS15, Line 61:          */
code indent should use tabs where possible


https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/bootblock/bootblock.c@188
PS15, Line 188: 	bb_ops->bootblock_soc_early_init= &bootblock_cmn_soc_early_init,
spaces required around that '=' (ctx:VxW)


https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/bootblock/bootblock.c@190
PS15, Line 190: 	bb_ops->bootblock_pch_early_init= &bootblock_cmn_pch_early_init,
spaces required around that '=' (ctx:VxW)


https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/bootblock/bootblock.c@192
PS15, Line 192: 	bb_ops->bootblock_cpu_early_init= &bootblock_cmn_cpu_early_init,
spaces required around that '=' (ctx:VxW)


https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/bootblock/bootblock.c@193
PS15, Line 193: 	bb_ops->bootblock_cpu_init 	= &bootblock_cmn_cpu_init;
please, no space before tabs


https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/bootblock/bootblock.c@196
PS15, Line 196: __weak void soc_update_ops(struct bootblock_ops* ops)
"foo* bar" should be "foo *bar"


https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/bootblock/bootblock.c@201
PS15, Line 201: void asmlinkage bootblock_c_entry(uint64_t base_timestamp)
storage class 'asmlinkage' should be located before type 'void'


https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/include/intelbasecode/bootblock.h
File src/soc/intel/common/basecode/include/intelbasecode/bootblock.h:

https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/include/intelbasecode/bootblock.h@36
PS15, Line 36: void soc_update_ops(struct bootblock_ops* soc_ops);
"foo* bar" should be "foo *bar"



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: If84c08d33f6f8fd3cd9722ee893653f1d1ae90c1
Gerrit-Change-Number: 18457
Gerrit-PatchSet: 15
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar at intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik at intel.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela at intel.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Shaunak Saha <shaunak.saha at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma at intel.com>
Gerrit-Comment-Date: Sat, 09 Jun 2018 00:38:51 +0000
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