[coreboot-gerrit] Change in coreboot[master]: amd/stoneyridge: Set SCI_MAP for SCI enabled GPIOs.

[Daniel Kurtz (Code Review)]

Daniel Kurtz has uploaded this change for review. ( https://review.coreboot.org/26930


Change subject: amd/stoneyridge: Set SCI_MAP for SCI enabled GPIOs.
......................................................................

amd/stoneyridge: Set SCI_MAP for SCI enabled GPIOs.

By default we use a 1:1 mapping between GEVENT bits and the corresponding
SCI_MAP entry.  However, we still must program the SCI_MAP entries
with the GEVENT number.

Signed-off-by: Daniel Kurtz <djkurtz at chromium.org>

BUG=b:109759838
TEST=(1) powerd_dbus_suspend
     (2) move finger on touchpad for ~1 second
   => system resumes from S3

Change-Id: Ie7be45264f9bfec56efc47a03071fdb924d16b6a
---
M src/soc/amd/stoneyridge/gpio.c
1 file changed, 5 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/26930/1

diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c
index 1b7f055..b09e79d 100644
--- a/src/soc/amd/stoneyridge/gpio.c
+++ b/src/soc/amd/stoneyridge/gpio.c
@@ -235,6 +235,7 @@
 		gpio_ptr = (uint32_t *)gpio_get_address(gpio);
 
 		if (control_flags & GPIO_SPECIAL_FLAG) {
+			uint8_t *sci_map;
 			gevent_num = get_gpio_gevent(gpio);
 			if (gevent_num < 0) {
 				printk(BIOS_WARNING, "Warning: GPIO pin %d has"
@@ -267,6 +268,10 @@
 				edge_level |= bit_edge << gevent_num;
 				direction |= bit_level << gevent_num;
 				mask |= (1 << gevent_num);
+				sci_map = (uint8_t*)(uintptr_t)(APU_SMI_BASE +
+						SMI_SCI_MAP(gevent_num));
+
+				write8(sci_map, gevent_num);
 				break;
 			default:
 				printk(BIOS_WARNING, "Error, flags 0x%08x\n",

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ie7be45264f9bfec56efc47a03071fdb924d16b6a
Gerrit-Change-Number: 26930
Gerrit-PatchSet: 1
Gerrit-Owner: Daniel Kurtz <djkurtz at google.com>
Gerrit-Reviewer: Daniel Kurtz <djkurtz at chromium.org>
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