[coreboot-gerrit] Change in coreboot[master]: nb/intel/haswell: Add an option for where verstage starts

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/26926


Change subject: nb/intel/haswell: Add an option for where verstage starts
......................................................................

nb/intel/haswell: Add an option for where verstage starts

Previously Haswell used a romcc bootblock and starting verstage in
romstage was madatory but with C_ENVIRONMENT_BOOTBLOCK it is also
possible to have a separate verstage.

This selects using a separate verstage by default but still keeps the
option around to use verstage in romstage.

Also make sure vbt.bin is only added to the COREBOOT fmap region as it
requires to be run at a specific offset.

Change-Id: I3b7b29f4a24c0fb830ff76fe31a35b6afcae4e67
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/northbridge/intel/haswell/Kconfig
1 file changed, 17 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/26926/1

diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index 9019a8b..0ce5c8c 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -28,8 +28,19 @@
 
 if NORTHBRIDGE_INTEL_HASWELL
 
+config HASWELL_VBOOT_IN_BOOTBLOCK
+	depends on VBOOT
+	bool "Start verstage in bootblock"
+	default n
+	select VBOOT_STARTS_IN_BOOTBLOCK
+	select VBOOT_SEPARATE_VERSTAGE
+	help
+	  Haswell can either start verstage in a separate stage
+	  right after the bootblock has run or it can start it
+	  after romstage for compatibility reasons.
+
 config VBOOT
-	select VBOOT_STARTS_IN_ROMSTAGE
+	select VBOOT_STARTS_IN_ROMSTAGE if !HASWELL_VBOOT_IN_BOOTBLOCK
 
 config BOOTBLOCK_NORTHBRIDGE_INIT
 	string
@@ -93,4 +104,9 @@
 	  VBIOS. On those systems we need to wait for a bit before executing
 	  the VBIOS.
 
+config RO_REGION_ONLY
+	string
+	depends on VBOOT
+	default "vbt.bin"
+
 endif

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I3b7b29f4a24c0fb830ff76fe31a35b6afcae4e67
Gerrit-Change-Number: 26926
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
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