[coreboot-gerrit] Change in coreboot[master]: mb/lenovo: Get rid of whitespace before tab

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/26630 )

Change subject: mb/lenovo: Get rid of whitespace before tab
......................................................................

mb/lenovo: Get rid of whitespace before tab

Change-Id: I958fe66655cc3c589ce6709b83c56a9472628324
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
Reviewed-on: https://review.coreboot.org/26630
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi at google.com>
---
M src/mainboard/lenovo/g505s/acpi/gpe.asl
M src/mainboard/lenovo/g505s/acpi/sleep.asl
M src/mainboard/lenovo/g505s/buildOpts.c
M src/mainboard/lenovo/g505s/mainboard.h
4 files changed, 8 insertions(+), 8 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Patrick Georgi: Looks good to me, approved



diff --git a/src/mainboard/lenovo/g505s/acpi/gpe.asl b/src/mainboard/lenovo/g505s/acpi/gpe.asl
index deecdc6..ace1d26 100644
--- a/src/mainboard/lenovo/g505s/acpi/gpe.asl
+++ b/src/mainboard/lenovo/g505s/acpi/gpe.asl
@@ -73,4 +73,4 @@
 		Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
-} 	/* End Scope GPE */
+}	/* End Scope GPE */
diff --git a/src/mainboard/lenovo/g505s/acpi/sleep.asl b/src/mainboard/lenovo/g505s/acpi/sleep.asl
index 947a2f2..d516cce 100644
--- a/src/mainboard/lenovo/g505s/acpi/sleep.asl
+++ b/src/mainboard/lenovo/g505s/acpi/sleep.asl
@@ -44,7 +44,7 @@
 
 	/* On older chips, clear PciExpWakeDisEn */
 	/*if (LLessEqual(\_SB.SBRI, 0x13)) {
-	*    	Store(0,\_SB.PWDE)
+	*	Store(0,\_SB.PWDE)
 	*}
 	*/
 
diff --git a/src/mainboard/lenovo/g505s/buildOpts.c b/src/mainboard/lenovo/g505s/buildOpts.c
index 3e28a30..9ef46d5 100644
--- a/src/mainboard/lenovo/g505s/buildOpts.c
+++ b/src/mainboard/lenovo/g505s/buildOpts.c
@@ -169,11 +169,11 @@
 #define BLDCFG_LVDS_POWER_ON_SEQ_BLON_TO_VARY_BL	3
 
 #if IS_ENABLED(CONFIG_GFXUMA)
-#define BLDCFG_UMA_ALIGNMENT                      UMA_4MB_ALIGNED
-#define BLDCFG_UMA_ALLOCATION_MODE		  UMA_SPECIFIED
-//#define BLDCFG_UMA_ALLOCATION_SIZE      	  0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
-#define BLDCFG_UMA_ALLOCATION_SIZE      	  0x2000//512M
-#define BLDCFG_UMA_ABOVE4G_SUPPORT                FALSE
+#define BLDCFG_UMA_ALIGNMENT			UMA_4MB_ALIGNED
+#define BLDCFG_UMA_ALLOCATION_MODE		UMA_SPECIFIED
+//#define BLDCFG_UMA_ALLOCATION_SIZE		0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
+#define BLDCFG_UMA_ALLOCATION_SIZE		0x2000//512M
+#define BLDCFG_UMA_ABOVE4G_SUPPORT		FALSE
 #endif
 
 #define BLDCFG_IOMMU_SUPPORT    TRUE
diff --git a/src/mainboard/lenovo/g505s/mainboard.h b/src/mainboard/lenovo/g505s/mainboard.h
index 7beb342..0a7ccd7 100644
--- a/src/mainboard/lenovo/g505s/mainboard.h
+++ b/src/mainboard/lenovo/g505s/mainboard.h
@@ -30,7 +30,7 @@
 /* Any GEVENT pin can be mapped to any GPE. We try to keep the mapping 1:1, but
  * we make the distinction between GEVENT pin and SCI.
  */
-#define EC_SCI_GPE 		EC_SCI_GEVENT
+#define EC_SCI_GPE		EC_SCI_GEVENT
 #define EC_LID_GPE		EC_LID_GEVENT
 #define PME_GPE			0x0b
 #define PCIE_GPE		0x18

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: merged
Gerrit-Change-Id: I958fe66655cc3c589ce6709b83c56a9472628324
Gerrit-Change-Number: 26630
Gerrit-PatchSet: 3
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
Gerrit-Reviewer: Patrick Georgi <pgeorgi at google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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