[coreboot-gerrit] Change in coreboot[master]: cpu/intel/car: Align the stack to 16 bytes before romstage_main

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/26797


Change subject: cpu/intel/car: Align the stack to 16 bytes before romstage_main
......................................................................

cpu/intel/car: Align the stack to 16 bytes before romstage_main

Change-Id: I1415c18779bc481fdec5f72f83c06a58ce6d5c39
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/cpu/intel/car/core2/cache_as_ram.S
M src/cpu/intel/car/non-evict/cache_as_ram.S
M src/cpu/intel/car/p4-netburst/cache_as_ram.S
3 files changed, 13 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/26797/1

diff --git a/src/cpu/intel/car/core2/cache_as_ram.S b/src/cpu/intel/car/core2/cache_as_ram.S
index c67c184..ecf97b07 100644
--- a/src/cpu/intel/car/core2/cache_as_ram.S
+++ b/src/cpu/intel/car/core2/cache_as_ram.S
@@ -168,6 +168,10 @@
 	/* Setup the stack. */
 	movl	$(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE), %eax
 	movl	%eax, %esp
+	/* Align the stack 16 bytes */
+	andl	$0xfffffff0, %esp
+	/* Account for pushing the BIST result */
+	sub	$4, %esp
 
 	/* Restore the BIST result. */
 	movl	%ebp, %eax
diff --git a/src/cpu/intel/car/non-evict/cache_as_ram.S b/src/cpu/intel/car/non-evict/cache_as_ram.S
index 76bfe12..3477ef9 100644
--- a/src/cpu/intel/car/non-evict/cache_as_ram.S
+++ b/src/cpu/intel/car/non-evict/cache_as_ram.S
@@ -173,6 +173,11 @@
 	movl	$(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE), %eax
 	movl	%eax, %esp
 
+	/* Align the stack 16 bytes */
+	andl	$0xfffffff0, %esp
+	/* Account for pushing the BIST result */
+	sub	$4, %esp
+
 	/* Restore the BIST result. */
 	movl	%ebp, %eax
 	movl	%esp, %ebp
diff --git a/src/cpu/intel/car/p4-netburst/cache_as_ram.S b/src/cpu/intel/car/p4-netburst/cache_as_ram.S
index 58782b9..02fadf6 100644
--- a/src/cpu/intel/car/p4-netburst/cache_as_ram.S
+++ b/src/cpu/intel/car/p4-netburst/cache_as_ram.S
@@ -341,6 +341,10 @@
 	/* Setup the stack. */
 	movl	$(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE), %eax
 	movl	%eax, %esp
+	/* Align the stack 16 bytes */
+	andl	$0xfffffff0, %esp
+	/* Account for pushing the BIST result */
+	sub	$4, %esp
 
 	/* Restore the BIST result. */
 	movl	%ebp, %eax

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I1415c18779bc481fdec5f72f83c06a58ce6d5c39
Gerrit-Change-Number: 26797
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
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