[coreboot-gerrit] Change in coreboot[master]: cavium/bdk: Read DDR freq from memory controller

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/27451


Change subject: cavium/bdk: Read DDR freq from memory controller
......................................................................

cavium/bdk: Read DDR freq from memory controller

The BDK config subsystem can't store values in romstage.
Read frequency from DDR memory controller instead from
BDK config.

Fixes memory info showing always 0 MT/s.

Change-Id: Iaee33e57e27ca182f41be923cf950868f66d3638
Signed-off-by: Patrick Rudolph <patrick.rudolph at 9elements.com>
---
M src/vendorcode/cavium/bdk/libbdk-dram/bdk-dram-config.c
1 file changed, 1 insertion(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/27451/1

diff --git a/src/vendorcode/cavium/bdk/libbdk-dram/bdk-dram-config.c b/src/vendorcode/cavium/bdk/libbdk-dram/bdk-dram-config.c
index 5c10423..2ec7a1a 100644
--- a/src/vendorcode/cavium/bdk/libbdk-dram/bdk-dram-config.c
+++ b/src/vendorcode/cavium/bdk/libbdk-dram/bdk-dram-config.c
@@ -106,7 +106,7 @@
     snprintf(info_string, INFO_STRING_LEN,
              " %ld MB, %ld MT/s, %s %s",
              bdk_dram_get_size_mbytes(node),
-             bdk_config_get_int(BDK_CONFIG_DDR_SPEED, node),
+             libdram_get_freq_from_pll(node, 0) / 1000000,
              (__bdk_dram_is_ddr4(node, 0)) ? "DDR4" : "DDR3",
              (__bdk_dram_is_rdimm(node, 0)) ? "RDIMM" : "UDIMM");
 

-- 
To view, visit https://review.coreboot.org/27451
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iaee33e57e27ca182f41be923cf950868f66d3638
Gerrit-Change-Number: 27451
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <patrick.rudolph at 9elements.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180712/5ab4b7c3/attachment-0001.html>