[coreboot-gerrit] Change in coreboot[master]: use __riscv_atomic to check support A extended.
Anonymous Coward (Code Review)
gerrit at coreboot.org
Mon Jul 2 10:13:45 CEST 2018
Anonymous Coward #1001664 has uploaded this change for review. ( https://review.coreboot.org/27300
Change subject: use __riscv_atomic to check support A extended.
......................................................................
use __riscv_atomic to check support A extended.
GCC pre-defined some macros for detecting ISA extensions.
We should use these macros to detect ISA features.
Change-Id: I5782cdd1bf64b0161c58d789f46389dccfe44475
Signed-off-by: XiangWang <wxjstz at 126.com>
---
M src/arch/riscv/include/atomic.h
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/27300/1
diff --git a/src/arch/riscv/include/atomic.h b/src/arch/riscv/include/atomic.h
index bc739fb..15702e4 100644
--- a/src/arch/riscv/include/atomic.h
+++ b/src/arch/riscv/include/atomic.h
@@ -39,7 +39,7 @@
#define atomic_set(ptr, val) (*(volatile typeof(*(ptr)) *)(ptr) = val)
#define atomic_read(ptr) (*(volatile typeof(*(ptr)) *)(ptr))
-#ifdef PK_ENABLE_ATOMICS
+#ifdef __riscv_atomic
# define atomic_add(ptr, inc) __sync_fetch_and_add(ptr, inc)
# define atomic_swap(ptr, swp) __sync_lock_test_and_set(ptr, swp)
# define atomic_cas(ptr, cmp, swp) __sync_val_compare_and_swap(ptr, cmp, swp)
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I5782cdd1bf64b0161c58d789f46389dccfe44475
Gerrit-Change-Number: 27300
Gerrit-PatchSet: 1
Gerrit-Owner: Anonymous Coward #1001664
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