[coreboot-gerrit] Change in coreboot[master]: amd/stoneyridge: Put stage cache into TSEG

[Marshall Dawson (Code Review)]

Hello build bot (Jenkins), 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/23519

to look at the new patch set (#2).

Change subject: amd/stoneyridge: Put stage cache into TSEG
......................................................................

amd/stoneyridge: Put stage cache into TSEG

Add a function to allow an external region to be located in TSEG.
Select the option to use memory outside of cbmem.  Increase the size
reserved in TSEG.

Change-Id: Ic1073af04475d862753136c9e14e2b2dde31fe66
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/soc/amd/stoneyridge/Kconfig
M src/soc/amd/stoneyridge/ramtop.c
2 files changed, 36 insertions(+), 1 deletion(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/23519/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Ic1073af04475d862753136c9e14e2b2dde31fe66
Gerrit-Change-Number: 23519
Gerrit-PatchSet: 2
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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