[coreboot-gerrit] Change in coreboot[master]: amd/stoneyridge: Put stage cache into TSEG

Marshall Dawson (Code Review) gerrit at coreboot.org
Wed Jan 31 19:59:13 CET 2018


Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/23519


Change subject: amd/stoneyridge: Put stage cache into TSEG
......................................................................

amd/stoneyridge: Put stage cache into TSEG

Add a function to allow an external region to be located in TSEG.
Select the option to use memory outside of cbmem.  Increase the size
reserved in TSEG.

Change-Id: Ic1073af04475d862753136c9e14e2b2dde31fe66
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/soc/amd/stoneyridge/Kconfig
M src/soc/amd/stoneyridge/ramtop.c
2 files changed, 12 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/23519/1

diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 148ca3f..7975523 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -55,6 +55,7 @@
 	select BOOTBLOCK_CONSOLE
 	select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
 	select RELOCATABLE_MODULES
+	select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
 	select PARALLEL_MP
 	select PARALLEL_MP_AP_WORK
 	select HAVE_SMI_HANDLER
@@ -295,7 +296,7 @@
 
 config SMM_RESERVED_SIZE
 	hex
-	default 0x100000
+	default 0x140000
 
 config ACPI_CPU_STRING
 	string
diff --git a/src/soc/amd/stoneyridge/ramtop.c b/src/soc/amd/stoneyridge/ramtop.c
index e676465..ca7511b 100644
--- a/src/soc/amd/stoneyridge/ramtop.c
+++ b/src/soc/amd/stoneyridge/ramtop.c
@@ -21,6 +21,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <cbmem.h>
+#include <stage_cache.h>
 #include <soc/northbridge.h>
 #include <soc/southbridge.h>
 
@@ -56,6 +57,15 @@
 	return CONFIG_SMM_TSEG_SIZE;
 }
 
+void stage_cache_external_region(void **base, size_t *size)
+{
+	if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) {
+		printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n");
+		*base = NULL;
+		*size = 0;
+	}
+}
+
 void smm_region_info(void **start, size_t *size)
 {
 	*start = (void *)smm_region_start();

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic1073af04475d862753136c9e14e2b2dde31fe66
Gerrit-Change-Number: 23519
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
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