[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add IPU enable option

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/23447


Change subject: soc/intel/cannonlake: Add IPU enable option
......................................................................

soc/intel/cannonlake: Add IPU enable option

Expose IPU (imaging processor unit) selection in FSP UPD files.

BUG=None
TEST=None

Change-Id: Ib2aa7d22795c96d4c907b8f8a5d6bb22f75de71a
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/chip.h
1 file changed, 3 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/23447/1

diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index a42494c..0e03eb8 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -108,6 +108,9 @@
 	 * 0:Disabled, 1:FixedLow, 2:FixedMid, 3:FixedHigh, 4:Enabled */
 	uint8_t SaGv;
 
+	/* Image Processing Unit Enbled */
+	uint8_t SaIpuEnable;
+
 	/* Rank Margin Tool. 1:Enable, 0:Disable */
 	uint8_t RMT;
 

-- 
To view, visit https://review.coreboot.org/23447
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ib2aa7d22795c96d4c907b8f8a5d6bb22f75de71a
Gerrit-Change-Number: 23447
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180126/742f1feb/attachment.html>