[coreboot-gerrit] Change in coreboot[master]: commonlib: Add AGESA S3 resume defines

[Marshall Dawson (Code Review)]

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/23439


Change subject: commonlib: Add AGESA S3 resume defines
......................................................................

commonlib: Add AGESA S3 resume defines

Extend the values reserved for AGESA to include the Entry Points used
for S3 Resume.

BUG=b:69614064

Change-Id: I6b50e76a0c49c1f317f9294c5f95735e7aa5d95c
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/commonlib/include/commonlib/timestamp_serialized.h
1 file changed, 6 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/23439/1

diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h
index 088212a..de92c72 100644
--- a/src/commonlib/include/commonlib/timestamp_serialized.h
+++ b/src/commonlib/include/commonlib/timestamp_serialized.h
@@ -92,6 +92,12 @@
 	TS_AGESA_INIT_LATE_DONE = 911,
 	TS_AGESA_INIT_RTB_START = 912,
 	TS_AGESA_INIT_RTB_DONE = 913,
+	TS_AGESA_INIT_RESUME_START = 914,
+	TS_AGESA_INIT_RESUME_DONE = 915,
+	TS_AGESA_S3_LATE_START = 916,
+	TS_AGESA_S3_LATE_DONE = 917,
+	TS_AGESA_S3_FINAL_START = 918,
+	TS_AGESA_S3_FINAL_DONE = 919,
 
 	/* 940-950 reserved for vendorcode extensions (940-950: Intel ME) */
 	TS_ME_INFORM_DRAM_WAIT = 940,

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6b50e76a0c49c1f317f9294c5f95735e7aa5d95c
Gerrit-Change-Number: 23439
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
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