[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add Pch iSCLK programming

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/23367 )

Change subject: soc/intel/cannonlake: Add Pch iSCLK programming
......................................................................


Patch Set 2:

(5 comments)

https://review.coreboot.org/#/c/23367/2/src/soc/intel/cannonlake/chip.h
File src/soc/intel/cannonlake/chip.h:

https://review.coreboot.org/#/c/23367/2/src/soc/intel/cannonlake/chip.h@262
PS2, Line 262: PchiSCLK
pch_isclk


https://review.coreboot.org/#/c/23367/2/src/soc/intel/cannonlake/finalize.c
File src/soc/intel/cannonlake/finalize.c:

https://review.coreboot.org/#/c/23367/2/src/soc/intel/cannonlake/finalize.c@40
PS2, Line 40: CAMERA1_CAMERA
Can you please add comments as to what CAMERA1_CAMERA and CAMERA2_CAMERA refer to?


https://review.coreboot.org/#/c/23367/2/src/soc/intel/cannonlake/finalize.c@72
PS2, Line 72: pch_enable_iSCLK
pch_enable_isclk


https://review.coreboot.org/#/c/23367/2/src/soc/intel/cannonlake/finalize.c@83
PS2, Line 83: /* unhide p2sb device */
above comment says if p2sb device is hidden, then dev becomes NULL. Would control still reach here in that case?


https://review.coreboot.org/#/c/23367/2/src/soc/intel/cannonlake/finalize.c@90
PS2, Line 90: disable_sideband_access();
            : 
            : 	/* hide p2sb device */
            : 	pci_write_config8(dev, PCH_P2SB_E0 + 1, 1);
Should sideband access be disabled unconditionally here even if it was not disabled before?



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I28c97a75f2a7f5122a20c8b8f0f2671037a7eca6
Gerrit-Change-Number: 23367
Gerrit-PatchSet: 2
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Chiranjeevi Rapolu <chiranjeevi.rapolu at intel.com>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro at google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Reviewer: caveh jalali <caveh at chromium.org>
Gerrit-Comment-Date: Tue, 23 Jan 2018 05:58:07 +0000
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