[coreboot-gerrit] Change in coreboot[master]: mainboard/google/meowth: enable PCH iSCLK

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/23368


Change subject: mainboard/google/meowth: enable PCH iSCLK
......................................................................

mainboard/google/meowth: enable PCH iSCLK

Turn on PCH iSCLK for meowth platform.

BUG=None
TEST=Boot up into OS and check register programming with iotools

Change-Id: I1e44e3748c9b37c8f60adcc47a866d445d77cfaa
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/mainboard/google/zoombini/variants/meowth/devicetree.cb
1 file changed, 3 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/23368/1

diff --git a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb
index 2317c90..d1bda29 100644
--- a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb
+++ b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb
@@ -57,6 +57,9 @@
 	register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)"
 	register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC0)"
 
+	# Pch iSCLk
+	register "PchiSCLK" = "1"
+
 	device domain 0 on
 		device pci 00.0 on  end # Host Bridge
 		device pci 02.0 on  end # Integrated Graphics Device

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I1e44e3748c9b37c8f60adcc47a866d445d77cfaa
Gerrit-Change-Number: 23368
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
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