[coreboot-gerrit] Change in coreboot[master]: intel/fsp: Update cannonlake fsp header
Lijian Zhao (Code Review)
gerrit at coreboot.org
Mon Jan 22 09:29:35 CET 2018
Hello Caveh Jalali, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/23351
to look at the new patch set (#3).
Change subject: intel/fsp: Update cannonlake fsp header
......................................................................
intel/fsp: Update cannonlake fsp header
Update Cannonlake FSP header to revision 7.x.20.52. Following changes
had been made:
1. Hide internal EV related options.
2. Add GT voltage override options.
3. Add PEG IMR selection.
4. Add PCH DMI ASPM options.
TEST=NONE
Change-Id: If186a1eb440266f1eaeb03505fe0ff4c6a521be6
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspUpd.h
M src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h
M src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspsUpd.h
M src/vendorcode/intel/fsp/fsp2_0/cannonlake/MemInfoHob.h
4 files changed, 405 insertions(+), 200 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/23351/3
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: If186a1eb440266f1eaeb03505fe0ff4c6a521be6
Gerrit-Change-Number: 23351
Gerrit-PatchSet: 3
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Caveh Jalali <caveh at google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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