[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Set PsysPmax value

[Gaggery Tsai (Code Review)]

Hello build bot (Jenkins), 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/23268

to look at the new patch set (#2).

Change subject: soc/intel/skylake: Set PsysPmax value
......................................................................

soc/intel/skylake: Set PsysPmax value

According to doc #543977 Power Architecture Guide, PsysPmax equals
to PL4 + Prop where Prop stands for "Reset of Platform" power and
PL4 is well-defined in document. This patch adds a "prop" member in
chip information which allows boards to setup Prop power in device
tree. PsysPmax value is calculated and passed to FSP through UPD.
Besides, move some common code from vr_config.c to common.c.

BUG=b:71594855
BRANCH=None
TEST=Set prop in device tree & "USE=fw_debug emerge-fizz chromeos-mrc
     coreboot chromeos-bootimage" & ensure correct PsysPmax value is
     calculated and passed to FSP-S through UPD. Verfied on KBL-R and
     KBL-U SKUs.

Change-Id: I44f2e2917a8eb9ce3bb69d9c15899d4c7c5b2883
Signed-off-by: Gaggery Tsai <gaggery.tsai at intel.com>
---
M src/soc/intel/skylake/Makefile.inc
M src/soc/intel/skylake/chip.h
M src/soc/intel/skylake/chip_fsp20.c
A src/soc/intel/skylake/common.c
A src/soc/intel/skylake/common.h
M src/soc/intel/skylake/cpu.c
M src/soc/intel/skylake/include/soc/cpu.h
M src/soc/intel/skylake/vr_config.c
8 files changed, 143 insertions(+), 38 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/23268/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I44f2e2917a8eb9ce3bb69d9c15899d4c7c5b2883
Gerrit-Change-Number: 23268
Gerrit-PatchSet: 2
Gerrit-Owner: Gaggery Tsai <gaggery.tsai at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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