[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Add definition for GENINT_DISABLE

[Martin Roth (Code Review)]

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/23227


Change subject: soc/amd/stoneyridge: Add definition for GENINT_DISABLE
......................................................................

soc/amd/stoneyridge: Add definition for GENINT_DISABLE

BUG=b:71867096
TEST=None

Change-Id: Ic8111d34355e6667c37a51d285ebb50c1659f4e5
Signed-off-by: Martin Roth <martinroth at google.com>
---
M src/soc/amd/stoneyridge/include/soc/southbridge.h
1 file changed, 1 insertion(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/23227/1

diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index bbf6344..d9016bc 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -93,6 +93,7 @@
 #define PM_HUD_SD_FLASH_CTRL		0xe7
 #define PM_YANG_SD_FLASH_CTRL		0xe8
 #define PM_PCIB_CFG			0xea
+#define   PM_GENINT_DISABLE		BIT(0)
 #define PM_LPC_GATING			0xec
 #define   PM_LPC_AB_NO_BYPASS_EN	BIT(2)
 #define   PM_LPC_A20_EN			BIT(1)

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic8111d34355e6667c37a51d285ebb50c1659f4e5
Gerrit-Change-Number: 23227
Gerrit-PatchSet: 1
Gerrit-Owner: Martin Roth <martinroth at google.com>
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