[coreboot-gerrit] Change in coreboot[master]: mainboard/google/kahlee: Enable PCIe Lane 2

[Martin Roth (Code Review)]

Hello build bot (Jenkins), Daniel Kurtz, 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/23210

to look at the new patch set (#3).

Change subject: mainboard/google/kahlee: Enable PCIe Lane 2
......................................................................

mainboard/google/kahlee: Enable PCIe Lane 2

The Port initializer had been changed from PortDisabled to PortEnabled,
but engine inializer hadn't been updated from PcieUnusedEngine to
PciePortEngine.  Update this so the port works.

Also change disabled port to PcieUnusedEngine.

BUG=b:71818026
TEST=PCIe device now shows up on D2F4

Change-Id: I11eb8c1fbad12fa9cf34d758a4ef3c22ef8ba4f7
Signed-off-by: Martin Roth <martinroth at google.com>
---
M src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
1 file changed, 2 insertions(+), 2 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/23210/3
-- 
To view, visit https://review.coreboot.org/23210
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I11eb8c1fbad12fa9cf34d758a4ef3c22ef8ba4f7
Gerrit-Change-Number: 23210
Gerrit-PatchSet: 3
Gerrit-Owner: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Daniel Kurtz <djkurtz at google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180111/05aaeb13/attachment.html>