[coreboot-gerrit] Change in coreboot[master]: intel/fsp2_0: Set boot mode default as per s3wake status

Aamir Bohra (Code Review) gerrit at coreboot.org
Mon Jan 8 06:57:22 CET 2018


Aamir Bohra has uploaded this change for review. ( https://review.coreboot.org/23156


Change subject: intel/fsp2_0: Set boot mode default as per s3wake status
......................................................................

intel/fsp2_0: Set boot mode default as per s3wake status

Currently bootmode default is set to FSP_BOOT_WITH_FULL_CONFIGURATION
and this upd is updated in fsp_fill_mrc_cache based on mrc cache data
validity. With current implementation in S3 resume path, if mrc cache
data is invalid, the bootmode is not updated further and remains set at
FSP_BOOT_WITH_FULL_CONFIGURATION. This results in fsp-m to get incorrect
boot mode context and reinitialize memory in S3 resume path. In correct
follow fspm should have correct bootmode context i.e S3 resume and return
error in case mrc cache data is invalid or not found.

BUG=b:70973961
BRANCH=None
TEST=Verify correct bootmode is set on S3 resume, even when
     mrc cache data is invalid.

Change-Id: Idc0da6ffbfe5ce616d852908a9b0074dc8ce7cbe
Signed-off-by: Aamir Bohra <aamir.bohra at intel.com>
---
M src/drivers/intel/fsp2_0/memory_init.c
1 file changed, 2 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/23156/1

diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index ce1265a..9c540ef 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -278,7 +278,8 @@
 
 	arch_upd->StackBase = (void *)stack_begin;
 
-	arch_upd->BootMode = FSP_BOOT_WITH_FULL_CONFIGURATION;
+	arch_upd->BootMode = s3wake ? FSP_BOOT_ON_S3_RESUME :
+		FSP_BOOT_WITH_FULL_CONFIGURATION;
 
 	/*
 	 * For S3 resume case, if valid mrc cache data is not found

-- 
To view, visit https://review.coreboot.org/23156
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Idc0da6ffbfe5ce616d852908a9b0074dc8ce7cbe
Gerrit-Change-Number: 23156
Gerrit-PatchSet: 1
Gerrit-Owner: Aamir Bohra <aamir.bohra at intel.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180108/59721cd0/attachment-0001.html>


More information about the coreboot-gerrit mailing list