[coreboot-gerrit] Change in coreboot[master]: drivers/mrc_cache: Always generate an FMAP region

Arthur Heymans (Code Review) gerrit at coreboot.org
Sun Jan 7 23:19:54 CET 2018


Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/23150


Change subject: drivers/mrc_cache: Always generate an FMAP region
......................................................................

drivers/mrc_cache: Always generate an FMAP region

This automatically generates an FMAP region for the MRC_CACHE driver
which is easier to handle a cbfsfile.

UNTESTED on hardware.

Change-Id: Iaaca36b1123b094ec1bbe5df4fb25660919173ca
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M Makefile.inc
M src/drivers/mrc_cache/Kconfig
M src/drivers/mrc_cache/Makefile.inc
M src/drivers/mrc_cache/mrc_cache.c
M util/cbfstool/default-x86.fmd
M util/cbfstool/default.fmd
6 files changed, 42 insertions(+), 36 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/23150/1

diff --git a/Makefile.inc b/Makefile.inc
index 413f7ad..fa780d4 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -773,7 +773,8 @@
 FMAP_BIOS_SIZE := $(shell echo $(CONFIG_CBFS_SIZE) | tr A-F a-f)
 # position and size of flashmap, relative to BIOS_BASE
 FMAP_FMAP_BASE := 0
-FMAP_FMAP_SIZE := 0x100
+FMAP_FMAP_SIZE := 0x200
+
 # position, size and entry line of CONSOLE relative to BIOS_BASE, if enabled
 ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
 FMAP_CONSOLE_BASE := $(call int-add, $(FMAP_FMAP_BASE) $(FMAP_FMAP_SIZE))
@@ -784,8 +785,24 @@
 FMAP_CONSOLE_SIZE := 0
 FMAP_CONSOLE_ENTRY :=
 endif # ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
+
+# position, size and entry line of MRC_CACHE relative to BIOS_BASE, if enabled
+ifeq ($(CONFIG_CACHE_MRC_SETTINGS),y)
+ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
+FMAP_MRC_CACHE_BASE := $(call int-add, $(FMAP_CONSOLE_BASE) $(FMAP_CONSOLE_SIZE))
+else
+FMAP_MRC_CACHE_BASE := $(call int-add, $(FMAP_FMAP_BASE) $(FMAP_FMAP_SIZE))
+endif
+FMAP_MRC_CACHE_SIZE := $(CONFIG_MRC_SETTINGS_CACHE_SIZE)
+FMAP_MRC_CACHE_ENTRY := RW_MRC_CACHE@$(FMAP_MRC_CACHE_BASE) $(FMAP_MRC_CACHE_SIZE)
+else # ifeq ($(CONFIG_CACHE_MRC_SETTINGS),y)
+FMAP_MRC_CACHE_BASE := 0
+FMAP_MRC_CACHE_SIZE := 0
+FMAP_MRC_CACHE_ENTRY :=
+endif # ifeq ($(CONFIG_CACHE_MRC_SETTINGS),y)
+
 # position and size of CBFS, relative to BIOS_BASE
-FMAP_CBFS_BASE := $(call int-add, $(FMAP_CONSOLE_SIZE) $(FMAP_FMAP_SIZE))
+FMAP_CBFS_BASE := $(call int-add, $(FMAP_MRC_CACHE_SIZE) $(FMAP_CONSOLE_SIZE) $(FMAP_FMAP_SIZE))
 FMAP_CBFS_SIZE := $(call int-subtract, $(FMAP_BIOS_SIZE) $(FMAP_CBFS_BASE))
 else # ifeq ($(CONFIG_ARCH_X86),y)
 DEFAULT_FLASHMAP:=$(top)/util/cbfstool/default.fmd
@@ -799,6 +816,7 @@
 # position and size of flashmap, relative to BIOS_BASE
 FMAP_FMAP_BASE := 0x20000
 FMAP_FMAP_SIZE := 0x100
+
 # position, size and entry line of CONSOLE relative to BIOS_BASE, if enabled
 ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
 FMAP_CONSOLE_BASE := $(call int-add, $(FMAP_FMAP_BASE) $(FMAP_FMAP_SIZE))
@@ -809,8 +827,26 @@
 FMAP_CONSOLE_SIZE := 0
 FMAP_CONSOLE_ENTRY :=
 endif # ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
+
+# position, size and entry line of MRC_CACHE relative to BIOS_BASE, if enabled
+ifeq ($(CONFIG_CACHE_MRC_SETTINGS),y)
+ifeq ($(CONFIG_CONSOLE_SPI_FLASH),y)
+FMAP_MRC_CACHE_BASE := $(call int-add, $(FMAP_CONSOLE_BASE) $(FMAP_CONSOLE_SIZE))
+else
+FMAP_MRC_CACHE_BASE := $(call int-add, $(FMAP_FMAP_BASE) $(FMAP_FMAP_SIZE))
+endif
+FMAP_MRC_CACHE_SIZE := $(CONFIG_MRC_SETTINGS_CACHE_SIZE)
+FMAP_MRC_CACHE_ENTRY := RW_MRC_CACHE@$(FMAP_MRC_CACHE_BASE) $(FMAP_MRC_CACHE_SIZE)
+else # ifeq ($(CONFIG_CACHE_MRC_SETTINGS),y)
+FMAP_MRC_CACHE_BASE := 0
+FMAP_MRC_CACHE_SIZE := 0
+FMAP_MRC_CACHE_ENTRY :=
+endif # ifeq ($(CONFIG_CACHE_MRC_SETTINGS),y)
+
+
 # position and size of CBFS, relative to BIOS_BASE
-FMAP_CBFS_BASE := $(call int-add,$(FMAP_FMAP_BASE) $(FMAP_FMAP_SIZE) $(FMAP_CONSOLE_SIZE))
+FMAP_CBFS_BASE := $(call int-add,$(FMAP_FMAP_BASE) $(FMAP_FMAP_SIZE) $(FMAP_CONSOLE_SIZE) \
+	$(FMAP_MRC_CACHE_SIZE))
 FMAP_CBFS_SIZE := $(call int-subtract,$(FMAP_BIOS_SIZE) $(FMAP_CBFS_BASE))
 endif # ifeq ($(CONFIG_ARCH_X86),y)
 
@@ -822,6 +858,7 @@
 	    -e "s,##FMAP_BASE##,$(FMAP_FMAP_BASE)," \
 	    -e "s,##FMAP_SIZE##,$(FMAP_FMAP_SIZE)," \
 	    -e "s,##CONSOLE_ENTRY##,$(FMAP_CONSOLE_ENTRY)," \
+	    -e "s,##MRC_CACHE_ENTRY##,$(FMAP_MRC_CACHE_ENTRY)," \
 	    -e "s,##CBFS_BASE##,$(FMAP_CBFS_BASE)," \
 	    -e "s,##CBFS_SIZE##,$(FMAP_CBFS_SIZE)," \
 		$(DEFAULT_FLASHMAP) > $@.tmp
diff --git a/src/drivers/mrc_cache/Kconfig b/src/drivers/mrc_cache/Kconfig
index 93ae6c6..a200464 100644
--- a/src/drivers/mrc_cache/Kconfig
+++ b/src/drivers/mrc_cache/Kconfig
@@ -5,10 +5,6 @@
 
 if CACHE_MRC_SETTINGS
 
-config MRC_SETTINGS_CACHE_BASE
-	hex
-	default 0xfffe0000
-
 config MRC_SETTINGS_CACHE_SIZE
 	hex
 	default 0x10000
diff --git a/src/drivers/mrc_cache/Makefile.inc b/src/drivers/mrc_cache/Makefile.inc
index 819d637..794952e 100644
--- a/src/drivers/mrc_cache/Makefile.inc
+++ b/src/drivers/mrc_cache/Makefile.inc
@@ -2,15 +2,4 @@
 romstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c
 ramstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c
 
-# Create and add the MRC cache to the cbfs image
-ifneq ($(CONFIG_CHROMEOS),y)
-$(obj)/mrc.cache: $(obj)/config.h
-	dd if=/dev/zero count=1 \
-	bs=$(shell printf "%d" $(CONFIG_MRC_SETTINGS_CACHE_SIZE) ) | \
-	tr '\000' '\377' > $@
-
-cbfs-files-$(CONFIG_CACHE_MRC_SETTINGS) += mrc.cache
-mrc.cache-file := $(obj)/mrc.cache
-mrc.cache-position := $(CONFIG_MRC_SETTINGS_CACHE_BASE)
-mrc.cache-type := mrc_cache
 endif
diff --git a/src/drivers/mrc_cache/mrc_cache.c b/src/drivers/mrc_cache/mrc_cache.c
index 3a96896..a12fa1e 100644
--- a/src/drivers/mrc_cache/mrc_cache.c
+++ b/src/drivers/mrc_cache/mrc_cache.c
@@ -98,26 +98,8 @@
 
 static int lookup_region_by_name(const char *name, struct region *r)
 {
-	/* This assumes memory mapped boot media just under 4GiB. */
-	const uint32_t pointer_base_32bit = -CONFIG_ROM_SIZE;
-
 	if (fmap_locate_area(name, r) == 0)
-		return 0;
-
-	/* CHROMEOS builds must get their MRC cache from FMAP. */
-	if (IS_ENABLED(CONFIG_CHROMEOS)) {
-		printk(BIOS_ERR, "MRC: Chrome OS lookup failure.\n");
 		return -1;
-	}
-
-	if (!IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED))
-		return -1;
-
-	/* Base is in the form of a pointer. Make it an offset. */
-	r->offset = CONFIG_MRC_SETTINGS_CACHE_BASE - pointer_base_32bit;
-	r->size = CONFIG_MRC_SETTINGS_CACHE_SIZE;
-
-	return 0;
 }
 
 static const struct cache_region *lookup_region_type(int type)
diff --git a/util/cbfstool/default-x86.fmd b/util/cbfstool/default-x86.fmd
index 1b6cfc8..1f1aa43 100644
--- a/util/cbfstool/default-x86.fmd
+++ b/util/cbfstool/default-x86.fmd
@@ -11,6 +11,7 @@
 	BIOS@##BIOS_BASE## ##BIOS_SIZE## {
 		FMAP@##FMAP_BASE## ##FMAP_SIZE##
 		##CONSOLE_ENTRY##
+		##MRC_CACHE_ENTRY##
 		COREBOOT(CBFS)@##CBFS_BASE## ##CBFS_SIZE##
 	}
 }
diff --git a/util/cbfstool/default.fmd b/util/cbfstool/default.fmd
index 50b9bf0..8f4819e 100644
--- a/util/cbfstool/default.fmd
+++ b/util/cbfstool/default.fmd
@@ -14,6 +14,7 @@
 		BOOTBLOCK 128K
 		FMAP@##FMAP_BASE## ##FMAP_SIZE##
 		##CONSOLE_ENTRY##
+		##MRC_CACHE_ENTRY##
 		COREBOOT(CBFS)@##CBFS_BASE## ##CBFS_SIZE##
 	}
 }

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iaaca36b1123b094ec1bbe5df4fb25660919173ca
Gerrit-Change-Number: 23150
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
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