[coreboot-gerrit] Change in coreboot[master]: mb/asus/p5gc-mx/romstage.c: Remove unused IO decode ranges

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/23134


Change subject: mb/asus/p5gc-mx/romstage.c: Remove unused IO decode ranges
......................................................................

mb/asus/p5gc-mx/romstage.c: Remove unused IO decode ranges

This source file was mostly copied from ga-945gcm-s2l but had
different IO decode ranges.

Change-Id: I54cb165000fad6984edf13fb33519fb9c9f0350f
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/mainboard/asus/p5gc-mx/romstage.c
1 file changed, 1 insertion(+), 3 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/23134/1

diff --git a/src/mainboard/asus/p5gc-mx/romstage.c b/src/mainboard/asus/p5gc-mx/romstage.c
index b13b3da..66006a7 100644
--- a/src/mainboard/asus/p5gc-mx/romstage.c
+++ b/src/mainboard/asus/p5gc-mx/romstage.c
@@ -114,10 +114,8 @@
 	pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_EN, CNF1_LPC_EN
 			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN | COMB_LPC_EN
 			| COMA_LPC_EN);
-	// Enable SuperIO Power Management Events
-	pci_write_config32(PCI_DEV(0, 0x1f, 0), GEN1_DEC, 0x000c0801);
 	/* range 0x15e0 - 0x10ef */
-	pci_write_config32(PCI_DEV(0, 0x1f, 0), GEN2_DEC, 0x00400291);
+	pci_write_config32(PCI_DEV(0, 0x1f, 0), GEN1_DEC, 0x00400291);
 }
 
 static void rcba_config(void)

-- 
To view, visit https://review.coreboot.org/23134
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I54cb165000fad6984edf13fb33519fb9c9f0350f
Gerrit-Change-Number: 23134
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180105/db2624be/attachment.html>