[coreboot-gerrit] Change in coreboot[master]: src/soc/qualcomm/sdm845: Support for new SoC
T.Michael Turney (Code Review)
gerrit at coreboot.org
Tue Feb 27 16:42:01 CET 2018
T.Michael Turney has uploaded this change for review. ( https://review.coreboot.org/24882
Change subject: src/soc/qualcomm/sdm845: Support for new SoC
......................................................................
src/soc/qualcomm/sdm845: Support for new SoC
Change-Id: I89c72bebb8597e879db273c3234bf8a84a0aa23b
---
A src/soc/qualcomm/sdm845/Kconfig
A src/soc/qualcomm/sdm845/Makefile.inc
A src/soc/qualcomm/sdm845/cbmem.c
A src/soc/qualcomm/sdm845/i2c.c
A src/soc/qualcomm/sdm845/include/soc/gpio.h
A src/soc/qualcomm/sdm845/include/soc/memlayout.ld
A src/soc/qualcomm/sdm845/soc.c
A src/soc/qualcomm/sdm845/spi.c
A src/soc/qualcomm/sdm845/timer.c
9 files changed, 313 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/24882/1
diff --git a/src/soc/qualcomm/sdm845/Kconfig b/src/soc/qualcomm/sdm845/Kconfig
new file mode 100644
index 0000000..747052e
--- /dev/null
+++ b/src/soc/qualcomm/sdm845/Kconfig
@@ -0,0 +1,36 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2018, The Linux Foundation. All rights reserved.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+config SOC_QUALCOMM_SDM845
+ bool
+ default n
+ select ARCH_BOOTBLOCK_ARMV8_64
+ select ARCH_RAMSTAGE_ARMV8_64
+ select ARCH_ROMSTAGE_ARMV8_64
+ select ARCH_VERSTAGE_ARMV8_64
+ select BOOTBLOCK_CONSOLE
+ select GENERIC_GPIO_LIB
+ select GENERIC_UDELAY
+ select HAVE_MONOTONIC_TIMER
+
+if SOC_QUALCOMM_SDM845
+
+config VBOOT
+ select VBOOT_SEPARATE_VERSTAGE
+ select VBOOT_RETURN_FROM_VERSTAGE
+ select VBOOT_OPROM_MATTERS
+ select VBOOT_STARTS_IN_BOOTBLOCK
+
+endif
diff --git a/src/soc/qualcomm/sdm845/Makefile.inc b/src/soc/qualcomm/sdm845/Makefile.inc
new file mode 100644
index 0000000..881ae2f
--- /dev/null
+++ b/src/soc/qualcomm/sdm845/Makefile.inc
@@ -0,0 +1,50 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2018, The Linux Foundation. All rights reserved.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+ifeq ($(CONFIG_SOC_QUALCOMM_SDM845),y)
+
+################################################################################
+bootblock-y += timer.c
+bootblock-y += spi.c
+bootblock-y += i2c.c
+
+################################################################################
+verstage-y += timer.c
+verstage-y += spi.c
+verstage-y += i2c.c
+
+################################################################################
+romstage-y += timer.c
+romstage-y += spi.c
+romstage-y += i2c.c
+romstage-y += cbmem.c
+
+################################################################################
+ramstage-y += soc.c
+ramstage-y += timer.c
+ramstage-y += spi.c
+ramstage-y += i2c.c
+ramstage-y += cbmem.c
+
+################################################################################
+
+CPPFLAGS_common += -Isrc/soc/qualcomm/sdm845/include
+
+$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
+ @printf "Generating: $(subst $(obj)/,,$(@))\n"
+ @mkdir -p $(dir $@)
+ cp $(objcbfs)/bootblock.raw.bin $(objcbfs)/bootblock.bin
+
+endif
diff --git a/src/soc/qualcomm/sdm845/cbmem.c b/src/soc/qualcomm/sdm845/cbmem.c
new file mode 100644
index 0000000..45cda8f
--- /dev/null
+++ b/src/soc/qualcomm/sdm845/cbmem.c
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <cbmem.h>
+
+void *cbmem_top(void)
+{
+ return NULL;
+}
diff --git a/src/soc/qualcomm/sdm845/i2c.c b/src/soc/qualcomm/sdm845/i2c.c
new file mode 100644
index 0000000..8ce6f54
--- /dev/null
+++ b/src/soc/qualcomm/sdm845/i2c.c
@@ -0,0 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/i2c_simple.h>
+
+int platform_i2c_transfer(unsigned bus, struct i2c_msg *segments,
+ int seg_count)
+{
+ return 0;
+}
diff --git a/src/soc/qualcomm/sdm845/include/soc/gpio.h b/src/soc/qualcomm/sdm845/include/soc/gpio.h
new file mode 100644
index 0000000..9b2a0f4
--- /dev/null
+++ b/src/soc/qualcomm/sdm845/include/soc/gpio.h
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _SOC_QUALCOMM_SDM845_GPIO_H_
+#define _SOC_QUALCOMM_SDM845_GPIO_H_
+
+#include <types.h>
+
+typedef u32 gpio_t;
+
+#endif // _SOC_QUALCOMM_SDM845_GPIO_H_
diff --git a/src/soc/qualcomm/sdm845/include/soc/memlayout.ld b/src/soc/qualcomm/sdm845/include/soc/memlayout.ld
new file mode 100644
index 0000000..11a4b5d
--- /dev/null
+++ b/src/soc/qualcomm/sdm845/include/soc/memlayout.ld
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <memlayout.h>
+#include <arch/header.ld>
+
+#define SRAM2_START(addr) SYMBOL(sram2, addr)
+#define SRAM2_END(addr) SYMBOL(esram2, addr)
+
+SECTIONS
+{
+ SRAM_START(0x14680000)
+ OVERLAP_VERSTAGE_ROMSTAGE(0x14680000, 95K)
+ SRAM_END(0x1469FC00)
+
+ SRAM2_START(0x14816000)
+ BOOTBLOCK(0x14816000, 32K)
+ TTB(0x1481E000, 64K)
+ VBOOT2_WORK(0x1482E000, 16K)
+ STACK(0x14832000, 16K)
+ TIMESTAMP(0x14836000, 1K)
+ PRERAM_CBMEM_CONSOLE(0x14836400, 32K)
+ PRERAM_CBFS_CACHE(0x1483E400, 70K)
+ REGION(qclib, 0x1484FC00, 1217K, 0x100)
+ SRAM2_END(0x14980000)
+
+ DRAM_START(0x80000000)
+ RAMSTAGE(0x80800000, 128K)
+ SYMBOL(memlayout_cbmem_top, 0xA1000000)
+ POSTRAM_CBFS_CACHE(0xA1000000, 384K)
+}
diff --git a/src/soc/qualcomm/sdm845/soc.c b/src/soc/qualcomm/sdm845/soc.c
new file mode 100644
index 0000000..9f2fbc4
--- /dev/null
+++ b/src/soc/qualcomm/sdm845/soc.c
@@ -0,0 +1,41 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/device.h>
+
+static void soc_read_resources(device_t dev)
+{
+
+}
+
+static void soc_init(device_t dev)
+{
+
+}
+
+static struct device_operations soc_ops = {
+ .read_resources = soc_read_resources,
+ .init = soc_init,
+};
+
+static void enable_soc_dev(device_t dev)
+{
+ dev->ops = &soc_ops;
+}
+
+struct chip_operations soc_qualcomm_sdm845_ops = {
+ CHIP_NAME("SOC Qualcomm SDM845")
+ .enable_dev = enable_soc_dev,
+};
diff --git a/src/soc/qualcomm/sdm845/spi.c b/src/soc/qualcomm/sdm845/spi.c
new file mode 100644
index 0000000..175b6cf
--- /dev/null
+++ b/src/soc/qualcomm/sdm845/spi.c
@@ -0,0 +1,50 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <spi-generic.h>
+#include <spi_flash.h>
+
+static int spi_ctrlr_claim_bus(const struct spi_slave *slave)
+{
+ return 0;
+}
+
+static void spi_ctrlr_release_bus(const struct spi_slave *slave)
+{
+
+}
+
+static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
+ size_t bytes_out, void *din, size_t bytes_in)
+{
+ return 0;
+}
+
+static const struct spi_ctrlr spi_ctrlr = {
+ .claim_bus = spi_ctrlr_claim_bus,
+ .release_bus = spi_ctrlr_release_bus,
+ .xfer = spi_ctrlr_xfer,
+ .max_xfer_size = 65535,
+};
+
+const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
+ {
+ .ctrlr = &spi_ctrlr,
+ .bus_start = 0,
+ .bus_end = 0,
+ },
+};
+
+const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);
diff --git a/src/soc/qualcomm/sdm845/timer.c b/src/soc/qualcomm/sdm845/timer.c
new file mode 100644
index 0000000..b1df161
--- /dev/null
+++ b/src/soc/qualcomm/sdm845/timer.c
@@ -0,0 +1,27 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <timer.h>
+#include <delay.h>
+
+void timer_monotonic_get(struct mono_time *mt)
+{
+
+}
+
+void init_timer(void)
+{
+
+}
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I89c72bebb8597e879db273c3234bf8a84a0aa23b
Gerrit-Change-Number: 24882
Gerrit-PatchSet: 1
Gerrit-Owner: T.Michael Turney <tturne at codeaurora.org>
Gerrit-Reviewer: mturney mturney <mturney at qualcomm.corp-partner.google.com>
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