[coreboot-gerrit] Change in coreboot[master]: [Not-for-merge]soc/cavium: Do raminit

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/23776


Change subject: [Not-for-merge]soc/cavium: Do raminit
......................................................................

[Not-for-merge]soc/cavium: Do raminit

Fixes to get raminit running, it still fails at writeleveling.
* Load devicetree from CBFS
* Load SPD
* Fix BDK reference clock

Change-Id: Ic1d4dbca51758268a8d71aa4cfacebaad717d668
Signed-off-by: Patrick Rudolph <patrick.rudolph at 9elements.com>
---
M src/soc/cavium/cn81xx/sdram.c
M src/soc/cavium/common/bdk/libdram/libdram-config-load.c
M src/soc/cavium/common/include/soc/bdk/libbdk-hal/bdk-clock.h
3 files changed, 22 insertions(+), 7 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/23776/1

diff --git a/src/soc/cavium/cn81xx/sdram.c b/src/soc/cavium/cn81xx/sdram.c
index 7466cdd..5e654d3 100644
--- a/src/soc/cavium/cn81xx/sdram.c
+++ b/src/soc/cavium/cn81xx/sdram.c
@@ -23,6 +23,7 @@
 //#include <soc/soc.h>
 //#include <timer.h>
 //#include <types.h>
+#include <cbfs.h>
 
 #include <soc/bdk/libbdk-arch/bdk-warn.h>
 #include <soc/bdk/libbdk-arch/bdk-csrs-rst.h>
@@ -123,6 +124,10 @@
 //    BDK_TRACE(INIT, "Initializing DRAM on node %d\n", node);
 	printk(BIOS_DEBUG, "Initializing DRAM\n");
 
+
+	bdk_config_set_fdt(cbfs_boot_map_with_leak(
+		"sff8104.dtb",
+		CBFS_TYPE_RAW, NULL));
 //    int mbytes = bdk_dram_config(node, override_for_speed);
 	/* FIXME: second arg is actually a desired frequency if set (the
 	 * function usually obtains frequency via the config). That might
diff --git a/src/soc/cavium/common/bdk/libdram/libdram-config-load.c b/src/soc/cavium/common/bdk/libdram/libdram-config-load.c
index 9e001b2..a16ee86 100644
--- a/src/soc/cavium/common/bdk/libdram/libdram-config-load.c
+++ b/src/soc/cavium/common/bdk/libdram/libdram-config-load.c
@@ -43,6 +43,8 @@
 #include <string.h>
 #include <libbdk-arch/bdk-model.h>
 #include <libbdk-hal/bdk-config.h>
+#include <soc/twsi.h>
+#include <device/i2c_simple.h>
 
 /**
  * Load a "odt_*rank_config" structure
@@ -165,12 +167,20 @@
             }
             else
             {
-		    /*
-		     * FIXME(dhendrix): The EVM has a DIMM, so we're OK skipping
-		     * this codepath for now. Long term we should make it get
-		     * SPD data via CBFS.
-		     */
-		    die("SPD address is unknown and I don't know how to fetch an SPD blob!");
+		/* FIXME: Hardcode one DIMM for now */
+		if (dimm > 0 || lmc > 0)
+			continue;
+
+		static u8 spd[256];
+		struct i2c_msg msg;
+
+		/* Read SPD from bus 1, device 0x50 */
+		cfg->config[0].dimm_config_table[0].spd_ptr = spd;
+		msg.buf = spd;
+		msg.len = sizeof(spd);
+		msg.slave = 0x50;
+		msg.flags = I2C_M_RD;
+		i2c_transfer(1, &msg, 1);
 #if 0
                 int spd_size;
                 const void *spd_data = bdk_config_get_blob(&spd_size, BDK_CONFIG_DDR_SPD_DATA, dimm, lmc, node);
diff --git a/src/soc/cavium/common/include/soc/bdk/libbdk-hal/bdk-clock.h b/src/soc/cavium/common/include/soc/bdk/libbdk-hal/bdk-clock.h
index 9a22fde..4be069d 100644
--- a/src/soc/cavium/common/include/soc/bdk/libbdk-hal/bdk-clock.h
+++ b/src/soc/cavium/common/include/soc/bdk/libbdk-hal/bdk-clock.h
@@ -57,7 +57,7 @@
  * @{
  */
 
-#define BDK_GTI_RATE 100000000ull
+#define BDK_GTI_RATE 1000000ull
 
 /**
  * Enumeration of different Clocks.

-- 
To view, visit https://review.coreboot.org/23776
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic1d4dbca51758268a8d71aa4cfacebaad717d668
Gerrit-Change-Number: 23776
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <patrick.rudolph at 9elements.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180215/490a8246/attachment-0001.html>