[coreboot-gerrit] Change in coreboot[master]: soc/broadcom/cygnus: Increase romstage SRAM size in memlayout

[Philipp Deppenwiese (Code Review)]

Philipp Deppenwiese has uploaded this change for review. ( https://review.coreboot.org/23764


Change subject: soc/broadcom/cygnus: Increase romstage SRAM size in memlayout
......................................................................

soc/broadcom/cygnus: Increase romstage SRAM size in memlayout

* Needed for additional code in later patches.
* SOC is obsolete anyway.

Change-Id: I5bbdf19cc886103e9e7a6b75219d6881cfe9c757
Signed-off-by: Philipp Deppenwiese <zaolin at das-labor.org>
---
M src/soc/broadcom/cygnus/include/soc/memlayout.ld
1 file changed, 3 insertions(+), 3 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/23764/1

diff --git a/src/soc/broadcom/cygnus/include/soc/memlayout.ld b/src/soc/broadcom/cygnus/include/soc/memlayout.ld
index 219ea13..42b59da 100644
--- a/src/soc/broadcom/cygnus/include/soc/memlayout.ld
+++ b/src/soc/broadcom/cygnus/include/soc/memlayout.ld
@@ -25,9 +25,9 @@
 	TTB_SUBTABLES(0x02008000, 1K)
 	REGION(reserved_for_maskrom, 0x02009400, 4K, 4)
 	BOOTBLOCK(0x0200A440, 18K)
-	PRERAM_CBMEM_CONSOLE(0x0200F000, 4K)
-	VBOOT2_WORK(0x02010000, 16K)
-	OVERLAP_VERSTAGE_ROMSTAGE(0x02014000, 120K)
+	PRERAM_CBMEM_CONSOLE(0x0200F000, 2K)
+	VBOOT2_WORK(0x0200f800, 16K)
+	OVERLAP_VERSTAGE_ROMSTAGE(0x02013800, 122K)
 	PRERAM_CBFS_CACHE(0x02032000, 1K)
 	TIMESTAMP(0x02032400, 1K)
 	STACK(0x02033000, 12K)

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I5bbdf19cc886103e9e7a6b75219d6881cfe9c757
Gerrit-Change-Number: 23764
Gerrit-PatchSet: 1
Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki at gmail.com>
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