[coreboot-gerrit] Change in coreboot[master]: mb/google/poopy/variants/nami: Add Pmax setting
Gaggery Tsai (Code Review)
gerrit at coreboot.org
Wed Feb 7 13:12:50 CET 2018
Gaggery Tsai has uploaded this change for review. ( https://review.coreboot.org/23640
Change subject: mb/google/poopy/variants/nami: Add Pmax setting
......................................................................
mb/google/poopy/variants/nami: Add Pmax setting
This patch adds the Pmax setting in device tree. The Pmax is from
MAX(PL4_sku1, PL4_sku2, ..) + ROPmax. Given ROPmax is 30W and
the maximum PL4 is from U42, hence the Pmax = 71W + 30W = 101W.
BUG=b:72138778
BRANCH=None
TEST=USE=fw_debug emerge-nami chromeos-mrc coreboot chromeos-bootimage
& ensure the Pmax value is passed to FSP-S.
Change-Id: Ief6a134dc5b6bd2b8e07b4a44450e99ff26402d9
Signed-off-by: Gaggery Tsai <gaggery.tsai at intel.com>
---
M src/mainboard/google/poppy/variants/nami/devicetree.cb
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/23640/1
diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb
index 55ecb26..7c38a3a 100644
--- a/src/mainboard/google/poppy/variants/nami/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb
@@ -229,6 +229,7 @@
register "speed_shift_enable" = "1"
register "tcc_offset" = "10" # TCC of 90C
+ register "psys_pmax" = "101"
# Lock Down
register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ief6a134dc5b6bd2b8e07b4a44450e99ff26402d9
Gerrit-Change-Number: 23640
Gerrit-PatchSet: 1
Gerrit-Owner: Gaggery Tsai <gaggery.tsai at intel.com>
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