[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: always select NO_UART_ON_SUPERIO

[Vadim Bendebury (Code Review)]

Vadim Bendebury has uploaded this change for review. ( https://review.coreboot.org/23602


Change subject: soc/intel/skylake: always select NO_UART_ON_SUPERIO
......................................................................

soc/intel/skylake: always select NO_UART_ON_SUPERIO

Not selecting NO_UART_ON_SUPERIO causes the DRIVERS_UART_8250IO config
flag to be enabled in src/drivers/uart/Kconfig, which in turn causes
the code for this driver to be included in the image by default.

BRANCH=none
BUG=none
TEST=TBD

Change-Id: I6c7071ac1a275435830e2ea9b7e5996594ea06ed
Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
---
M src/soc/intel/skylake/Kconfig
1 file changed, 1 insertion(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/23602/1

diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 34893dc..9a9d9d2 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -45,6 +45,7 @@
 	select PCIEXP_COMMON_CLOCK
 	select PCIEXP_L1_SUB_STATE
 	select PCIEX_LENGTH_64MB
+	select NO_UART_ON_SUPERIO
 	select REG_SCRIPT
 	select RELOCATABLE_MODULES
 	select RELOCATABLE_RAMSTAGE
@@ -209,7 +210,6 @@
 	select CONSOLE_SERIAL
 	select DRIVERS_UART
 	select DRIVERS_UART_8250MEM_32
-	select NO_UART_ON_SUPERIO
 
 config UART_FOR_CONSOLE
 	int "Index for LPSS UART port to use for console"

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6c7071ac1a275435830e2ea9b7e5996594ea06ed
Gerrit-Change-Number: 23602
Gerrit-PatchSet: 1
Gerrit-Owner: Vadim Bendebury <vbendeb at chromium.org>
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