[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add support for EMMC DLL update

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/23600


Change subject: soc/intel/cannonlake: Add support for EMMC DLL update
......................................................................

soc/intel/cannonlake: Add support for EMMC DLL update

Add option to have customized DLL setting for EMMC interface to make
EMMC able to running at HS400 speed.

BUG=None

Change-Id: I38bc022d8c05dd1fbd03dc26aa6f33cd249e8248
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/chip.c
M src/soc/intel/cannonlake/chip.h
2 files changed, 12 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/23600/1

diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index f05b55a..68f95d3 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -262,6 +262,12 @@
 	/* eMMC and SD */
 	params->ScsEmmcEnabled = config->ScsEmmcEnabled;
 	params->ScsEmmcHs400Enabled = config->ScsEmmcHs400Enabled;
+	params->PchScsEmmcHs400DllDataValid = config->EmmcHs400DllNeed;
+	if (config->EmmcHs400DllNeed == 1) {
+		params->PchScsEmmcHs400RxStrobeDll1 =
+			config->EmmcHs400RxStrobeDll1;
+		params->PchScsEmmcHs400TxDataDll = config->EmmcHs400TxDataDll;
+	}
 	params->ScsSdCardEnabled = config->ScsSdCardEnabled;
 	params->ScsUfsEnabled = config->ScsUfsEnabled;
 
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index a42494c..fd86b8d 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -155,7 +155,12 @@
 	/* eMMC and SD */
 	uint8_t ScsEmmcEnabled;
 	uint8_t ScsEmmcHs400Enabled;
-	uint8_t PchScsEmmcHs400TuningRequired;
+	/* Need to update DLL setting to get Emmc running at HS400 speed */
+	uint8_t EmmcHs400DllNeed;
+	/* 0-39: number of active delay for RX strobe, unit is 125 pSec */
+	uint8_t EmmcHs400RxStrobeDll1;
+	/* 0-78: number of active delay for TX data, unit is 125 pSec */
+	uint8_t EmmcHs400TxDataDll;
 	uint8_t ScsSdCardEnabled;
 	uint8_t ScsUfsEnabled;
 

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I38bc022d8c05dd1fbd03dc26aa6f33cd249e8248
Gerrit-Change-Number: 23600
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
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